Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8433933 |
1 |
|
|
T22 |
338 |
|
T1 |
13455 |
|
T11 |
23598 |
| auto[1] |
6275562 |
1 |
|
|
T1 |
12910 |
|
T11 |
17996 |
|
T13 |
148 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13897431 |
1 |
|
|
T22 |
338 |
|
T1 |
25185 |
|
T11 |
39231 |
| auto[1] |
812064 |
1 |
|
|
T1 |
1180 |
|
T11 |
2363 |
|
T13 |
10 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8397038 |
1 |
|
|
T22 |
338 |
|
T1 |
15183 |
|
T11 |
22342 |
| auto[1] |
6312457 |
1 |
|
|
T1 |
11182 |
|
T11 |
19252 |
|
T13 |
145 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2752326 |
1 |
|
|
T1 |
4652 |
|
T11 |
8754 |
|
T13 |
62 |
| auto[1] |
auto[0] |
auto[1] |
405643 |
1 |
|
|
T1 |
504 |
|
T11 |
1291 |
|
T13 |
4 |
| auto[1] |
auto[1] |
auto[0] |
2748067 |
1 |
|
|
T1 |
5350 |
|
T11 |
8135 |
|
T13 |
73 |
| auto[1] |
auto[1] |
auto[1] |
406421 |
1 |
|
|
T1 |
676 |
|
T11 |
1072 |
|
T13 |
6 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |