Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8431201 |
1 |
|
|
T22 |
338 |
|
T1 |
14200 |
|
T11 |
21625 |
| auto[1] |
6278294 |
1 |
|
|
T1 |
12165 |
|
T11 |
19969 |
|
T13 |
95 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13898483 |
1 |
|
|
T22 |
338 |
|
T1 |
25294 |
|
T11 |
39319 |
| auto[1] |
811012 |
1 |
|
|
T1 |
1071 |
|
T11 |
2275 |
|
T13 |
10 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8401888 |
1 |
|
|
T22 |
338 |
|
T1 |
15648 |
|
T11 |
23325 |
| auto[1] |
6307607 |
1 |
|
|
T1 |
10717 |
|
T11 |
18269 |
|
T13 |
167 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2752482 |
1 |
|
|
T1 |
4735 |
|
T11 |
7320 |
|
T13 |
98 |
| auto[1] |
auto[0] |
auto[1] |
407255 |
1 |
|
|
T1 |
548 |
|
T11 |
1044 |
|
T13 |
8 |
| auto[1] |
auto[1] |
auto[0] |
2744113 |
1 |
|
|
T1 |
4911 |
|
T11 |
8674 |
|
T13 |
59 |
| auto[1] |
auto[1] |
auto[1] |
403757 |
1 |
|
|
T1 |
523 |
|
T11 |
1231 |
|
T13 |
2 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |