Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8430194 |
1 |
|
|
T22 |
338 |
|
T1 |
14888 |
|
T11 |
22632 |
| auto[1] |
6279301 |
1 |
|
|
T1 |
11477 |
|
T11 |
18962 |
|
T13 |
135 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13898193 |
1 |
|
|
T22 |
338 |
|
T1 |
25208 |
|
T11 |
38878 |
| auto[1] |
811302 |
1 |
|
|
T1 |
1157 |
|
T11 |
2716 |
|
T13 |
6 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8403348 |
1 |
|
|
T22 |
338 |
|
T1 |
15595 |
|
T11 |
21153 |
| auto[1] |
6306147 |
1 |
|
|
T1 |
10770 |
|
T11 |
20441 |
|
T13 |
108 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2752657 |
1 |
|
|
T1 |
4789 |
|
T11 |
8630 |
|
T13 |
49 |
| auto[1] |
auto[0] |
auto[1] |
407643 |
1 |
|
|
T1 |
617 |
|
T11 |
1294 |
|
T13 |
3 |
| auto[1] |
auto[1] |
auto[0] |
2742188 |
1 |
|
|
T1 |
4824 |
|
T11 |
9095 |
|
T13 |
53 |
| auto[1] |
auto[1] |
auto[1] |
403659 |
1 |
|
|
T1 |
540 |
|
T11 |
1422 |
|
T13 |
3 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |