Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8423816 |
1 |
|
|
T22 |
338 |
|
T1 |
14802 |
|
T11 |
21675 |
auto[1] |
6285679 |
1 |
|
|
T1 |
11563 |
|
T11 |
19919 |
|
T13 |
79 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13908702 |
1 |
|
|
T22 |
338 |
|
T1 |
25078 |
|
T11 |
39013 |
auto[1] |
800793 |
1 |
|
|
T1 |
1287 |
|
T11 |
2581 |
|
T13 |
5 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8465673 |
1 |
|
|
T22 |
338 |
|
T1 |
14597 |
|
T11 |
21420 |
auto[1] |
6243822 |
1 |
|
|
T1 |
11768 |
|
T11 |
20174 |
|
T13 |
129 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
2730096 |
1 |
|
|
T1 |
5265 |
|
T11 |
8151 |
|
T13 |
97 |
auto[1] |
auto[0] |
auto[1] |
402317 |
1 |
|
|
T1 |
662 |
|
T11 |
1146 |
|
T13 |
4 |
auto[1] |
auto[1] |
auto[0] |
2712933 |
1 |
|
|
T1 |
5216 |
|
T11 |
9442 |
|
T13 |
27 |
auto[1] |
auto[1] |
auto[1] |
398476 |
1 |
|
|
T1 |
625 |
|
T11 |
1435 |
|
T13 |
1 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |