Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8417793 |
1 |
|
|
T22 |
338 |
|
T1 |
14307 |
|
T11 |
22067 |
| auto[1] |
6291702 |
1 |
|
|
T1 |
12058 |
|
T11 |
19527 |
|
T13 |
140 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13904057 |
1 |
|
|
T22 |
338 |
|
T1 |
25035 |
|
T11 |
39057 |
| auto[1] |
805438 |
1 |
|
|
T1 |
1330 |
|
T11 |
2537 |
|
T13 |
9 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8436198 |
1 |
|
|
T22 |
338 |
|
T1 |
14457 |
|
T11 |
22368 |
| auto[1] |
6273297 |
1 |
|
|
T1 |
11908 |
|
T11 |
19226 |
|
T13 |
146 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2737305 |
1 |
|
|
T1 |
5375 |
|
T11 |
8164 |
|
T13 |
53 |
| auto[1] |
auto[0] |
auto[1] |
403693 |
1 |
|
|
T1 |
696 |
|
T11 |
1214 |
|
T16 |
14 |
| auto[1] |
auto[1] |
auto[0] |
2730554 |
1 |
|
|
T1 |
5203 |
|
T11 |
8525 |
|
T13 |
84 |
| auto[1] |
auto[1] |
auto[1] |
401745 |
1 |
|
|
T1 |
634 |
|
T11 |
1323 |
|
T13 |
9 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |