Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7464490 |
1 |
|
|
T21 |
36 |
|
T22 |
17009 |
|
T23 |
142 |
| auto[1] |
5394180 |
1 |
|
|
T21 |
33 |
|
T28 |
1121 |
|
T29 |
460 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10649819 |
1 |
|
|
T21 |
60 |
|
T22 |
17009 |
|
T23 |
142 |
| auto[1] |
2208851 |
1 |
|
|
T21 |
9 |
|
T28 |
554 |
|
T29 |
91 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7482245 |
1 |
|
|
T21 |
33 |
|
T22 |
17009 |
|
T23 |
142 |
| auto[1] |
5376425 |
1 |
|
|
T21 |
36 |
|
T28 |
1105 |
|
T29 |
421 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1568583 |
1 |
|
|
T21 |
15 |
|
T28 |
281 |
|
T29 |
157 |
| auto[1] |
auto[0] |
auto[1] |
1094193 |
1 |
|
|
T21 |
3 |
|
T28 |
255 |
|
T29 |
51 |
| auto[1] |
auto[1] |
auto[0] |
1598991 |
1 |
|
|
T21 |
12 |
|
T28 |
270 |
|
T29 |
173 |
| auto[1] |
auto[1] |
auto[1] |
1114658 |
1 |
|
|
T21 |
6 |
|
T28 |
299 |
|
T29 |
40 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |