Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7514710 |
1 |
|
|
T21 |
10 |
|
T22 |
17009 |
|
T23 |
142 |
| auto[1] |
5343960 |
1 |
|
|
T21 |
59 |
|
T28 |
1099 |
|
T29 |
359 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10669231 |
1 |
|
|
T21 |
59 |
|
T22 |
17009 |
|
T23 |
142 |
| auto[1] |
2189439 |
1 |
|
|
T21 |
10 |
|
T28 |
481 |
|
T29 |
78 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7520568 |
1 |
|
|
T21 |
50 |
|
T22 |
17009 |
|
T23 |
142 |
| auto[1] |
5338102 |
1 |
|
|
T21 |
19 |
|
T28 |
981 |
|
T29 |
416 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1584916 |
1 |
|
|
T21 |
1 |
|
T28 |
181 |
|
T29 |
148 |
| auto[1] |
auto[0] |
auto[1] |
1092626 |
1 |
|
|
T21 |
7 |
|
T28 |
189 |
|
T29 |
43 |
| auto[1] |
auto[1] |
auto[0] |
1563747 |
1 |
|
|
T21 |
8 |
|
T28 |
319 |
|
T29 |
190 |
| auto[1] |
auto[1] |
auto[1] |
1096813 |
1 |
|
|
T21 |
3 |
|
T28 |
292 |
|
T29 |
35 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |