Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
2440075 |
1 |
|
|
T19 |
10 |
|
T23 |
98 |
|
T1 |
13733 |
auto[1] |
auto[0] |
auto[1] |
358174 |
1 |
|
|
T19 |
1 |
|
T23 |
8 |
|
T1 |
2084 |
auto[1] |
auto[1] |
auto[0] |
2450757 |
1 |
|
|
T19 |
7 |
|
T23 |
99 |
|
T1 |
12738 |
auto[1] |
auto[1] |
auto[1] |
359703 |
1 |
|
|
T23 |
3 |
|
T1 |
1812 |
|
T12 |
1960 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |