Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7901317 |
1 |
|
|
T19 |
52 |
|
T22 |
203 |
|
T23 |
215 |
| auto[1] |
5613804 |
1 |
|
|
T19 |
8 |
|
T23 |
168 |
|
T1 |
28940 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11157607 |
1 |
|
|
T19 |
54 |
|
T22 |
203 |
|
T23 |
309 |
| auto[1] |
2357514 |
1 |
|
|
T19 |
6 |
|
T23 |
74 |
|
T1 |
16936 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7895164 |
1 |
|
|
T19 |
47 |
|
T22 |
203 |
|
T23 |
241 |
| auto[1] |
5619957 |
1 |
|
|
T19 |
13 |
|
T23 |
142 |
|
T1 |
27574 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1632835 |
1 |
|
|
T19 |
7 |
|
T23 |
41 |
|
T1 |
5060 |
| auto[1] |
auto[0] |
auto[1] |
1176106 |
1 |
|
|
T19 |
4 |
|
T23 |
43 |
|
T1 |
7917 |
| auto[1] |
auto[1] |
auto[0] |
1629608 |
1 |
|
|
T23 |
27 |
|
T1 |
5578 |
|
T2 |
9 |
| auto[1] |
auto[1] |
auto[1] |
1181408 |
1 |
|
|
T19 |
2 |
|
T23 |
31 |
|
T1 |
9019 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |