Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8955602 |
1 |
|
|
T23 |
349 |
|
T1 |
694 |
|
T11 |
1342 |
| auto[1] |
6743767 |
1 |
|
|
T1 |
603 |
|
T11 |
1126 |
|
T12 |
59 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14831085 |
1 |
|
|
T23 |
349 |
|
T1 |
1272 |
|
T11 |
2191 |
| auto[1] |
868284 |
1 |
|
|
T1 |
25 |
|
T11 |
277 |
|
T12 |
4 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8949240 |
1 |
|
|
T23 |
349 |
|
T1 |
799 |
|
T11 |
1004 |
| auto[1] |
6750129 |
1 |
|
|
T1 |
498 |
|
T11 |
1464 |
|
T12 |
108 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2931044 |
1 |
|
|
T1 |
228 |
|
T11 |
597 |
|
T12 |
69 |
| auto[1] |
auto[0] |
auto[1] |
431867 |
1 |
|
|
T1 |
13 |
|
T11 |
128 |
|
T12 |
2 |
| auto[1] |
auto[1] |
auto[0] |
2950801 |
1 |
|
|
T1 |
245 |
|
T11 |
590 |
|
T12 |
35 |
| auto[1] |
auto[1] |
auto[1] |
436417 |
1 |
|
|
T1 |
12 |
|
T11 |
149 |
|
T12 |
2 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |