Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8907855 |
1 |
|
|
T19 |
240 |
|
T20 |
1242 |
|
T21 |
79244 |
| auto[1] |
6587678 |
1 |
|
|
T20 |
1049 |
|
T21 |
80000 |
|
T1 |
40108 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12808657 |
1 |
|
|
T19 |
240 |
|
T20 |
1477 |
|
T21 |
131385 |
| auto[1] |
2686876 |
1 |
|
|
T20 |
814 |
|
T21 |
27859 |
|
T1 |
15520 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8901204 |
1 |
|
|
T19 |
240 |
|
T20 |
1237 |
|
T21 |
81345 |
| auto[1] |
6594329 |
1 |
|
|
T20 |
1054 |
|
T21 |
77899 |
|
T1 |
41114 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1955995 |
1 |
|
|
T20 |
140 |
|
T21 |
24856 |
|
T1 |
12846 |
| auto[1] |
auto[0] |
auto[1] |
1339871 |
1 |
|
|
T20 |
398 |
|
T21 |
13585 |
|
T1 |
7911 |
| auto[1] |
auto[1] |
auto[0] |
1951458 |
1 |
|
|
T20 |
100 |
|
T21 |
25184 |
|
T1 |
12748 |
| auto[1] |
auto[1] |
auto[1] |
1347005 |
1 |
|
|
T20 |
416 |
|
T21 |
14274 |
|
T1 |
7609 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |