Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8903390 |
1 |
|
|
T19 |
240 |
|
T20 |
1256 |
|
T21 |
76027 |
| auto[1] |
6592143 |
1 |
|
|
T20 |
1035 |
|
T21 |
83217 |
|
T1 |
41411 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12812364 |
1 |
|
|
T19 |
240 |
|
T20 |
1471 |
|
T21 |
131040 |
| auto[1] |
2683169 |
1 |
|
|
T20 |
820 |
|
T21 |
28204 |
|
T1 |
15081 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8921056 |
1 |
|
|
T19 |
240 |
|
T20 |
1152 |
|
T21 |
80899 |
| auto[1] |
6574477 |
1 |
|
|
T20 |
1139 |
|
T21 |
78345 |
|
T1 |
41959 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1948495 |
1 |
|
|
T20 |
177 |
|
T21 |
22585 |
|
T1 |
13568 |
| auto[1] |
auto[0] |
auto[1] |
1342569 |
1 |
|
|
T20 |
409 |
|
T21 |
13253 |
|
T1 |
7738 |
| auto[1] |
auto[1] |
auto[0] |
1942813 |
1 |
|
|
T20 |
142 |
|
T21 |
27556 |
|
T1 |
13310 |
| auto[1] |
auto[1] |
auto[1] |
1340600 |
1 |
|
|
T20 |
411 |
|
T21 |
14951 |
|
T1 |
7343 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |