Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8906487 |
1 |
|
|
T19 |
240 |
|
T20 |
1178 |
|
T21 |
81100 |
| auto[1] |
6589046 |
1 |
|
|
T20 |
1113 |
|
T21 |
78144 |
|
T1 |
42532 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12816301 |
1 |
|
|
T19 |
240 |
|
T20 |
1482 |
|
T21 |
130241 |
| auto[1] |
2679232 |
1 |
|
|
T20 |
809 |
|
T21 |
29003 |
|
T1 |
15760 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8930314 |
1 |
|
|
T19 |
240 |
|
T20 |
1309 |
|
T21 |
79743 |
| auto[1] |
6565219 |
1 |
|
|
T20 |
982 |
|
T21 |
79501 |
|
T1 |
43232 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1955132 |
1 |
|
|
T20 |
96 |
|
T21 |
26187 |
|
T1 |
12014 |
| auto[1] |
auto[0] |
auto[1] |
1349100 |
1 |
|
|
T20 |
383 |
|
T21 |
14731 |
|
T1 |
7205 |
| auto[1] |
auto[1] |
auto[0] |
1930855 |
1 |
|
|
T20 |
77 |
|
T21 |
24311 |
|
T1 |
15458 |
| auto[1] |
auto[1] |
auto[1] |
1330132 |
1 |
|
|
T20 |
426 |
|
T21 |
14272 |
|
T1 |
8555 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |