Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8926203 |
1 |
|
|
T19 |
240 |
|
T20 |
1019 |
|
T21 |
80978 |
| auto[1] |
6569330 |
1 |
|
|
T20 |
1272 |
|
T21 |
78266 |
|
T1 |
38930 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12814102 |
1 |
|
|
T19 |
240 |
|
T20 |
1347 |
|
T21 |
132300 |
| auto[1] |
2681431 |
1 |
|
|
T20 |
944 |
|
T21 |
26944 |
|
T1 |
14019 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8918545 |
1 |
|
|
T19 |
240 |
|
T20 |
1089 |
|
T21 |
83690 |
| auto[1] |
6576988 |
1 |
|
|
T20 |
1202 |
|
T21 |
75554 |
|
T1 |
38435 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1943103 |
1 |
|
|
T20 |
102 |
|
T21 |
24664 |
|
T1 |
11670 |
| auto[1] |
auto[0] |
auto[1] |
1342957 |
1 |
|
|
T20 |
429 |
|
T21 |
13666 |
|
T1 |
6813 |
| auto[1] |
auto[1] |
auto[0] |
1952454 |
1 |
|
|
T20 |
156 |
|
T21 |
23946 |
|
T1 |
12746 |
| auto[1] |
auto[1] |
auto[1] |
1338474 |
1 |
|
|
T20 |
515 |
|
T21 |
13278 |
|
T1 |
7206 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |