Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8919121 |
1 |
|
|
T19 |
240 |
|
T20 |
1127 |
|
T21 |
83284 |
| auto[1] |
6576412 |
1 |
|
|
T20 |
1164 |
|
T21 |
75960 |
|
T1 |
39977 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12803714 |
1 |
|
|
T19 |
240 |
|
T20 |
1321 |
|
T21 |
130013 |
| auto[1] |
2691819 |
1 |
|
|
T20 |
970 |
|
T21 |
29231 |
|
T1 |
14714 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8889118 |
1 |
|
|
T19 |
240 |
|
T20 |
1022 |
|
T21 |
78272 |
| auto[1] |
6606415 |
1 |
|
|
T20 |
1269 |
|
T21 |
80972 |
|
T1 |
39283 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1964382 |
1 |
|
|
T20 |
125 |
|
T21 |
28058 |
|
T1 |
12092 |
| auto[1] |
auto[0] |
auto[1] |
1347276 |
1 |
|
|
T20 |
452 |
|
T21 |
15831 |
|
T1 |
7252 |
| auto[1] |
auto[1] |
auto[0] |
1950214 |
1 |
|
|
T20 |
174 |
|
T21 |
23683 |
|
T1 |
12477 |
| auto[1] |
auto[1] |
auto[1] |
1344543 |
1 |
|
|
T20 |
518 |
|
T21 |
13400 |
|
T1 |
7462 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |