Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7035507 |
1 |
|
|
T23 |
51 |
|
T24 |
374 |
|
T25 |
220 |
| auto[1] |
4887897 |
1 |
|
|
T23 |
92 |
|
T24 |
386 |
|
T1 |
23643 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11301009 |
1 |
|
|
T23 |
139 |
|
T24 |
748 |
|
T25 |
220 |
| auto[1] |
622395 |
1 |
|
|
T23 |
4 |
|
T24 |
12 |
|
T1 |
3079 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7032027 |
1 |
|
|
T23 |
57 |
|
T24 |
379 |
|
T25 |
220 |
| auto[1] |
4891377 |
1 |
|
|
T23 |
86 |
|
T24 |
381 |
|
T1 |
23766 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2141228 |
1 |
|
|
T23 |
26 |
|
T24 |
209 |
|
T1 |
10368 |
| auto[1] |
auto[0] |
auto[1] |
312673 |
1 |
|
|
T23 |
4 |
|
T24 |
8 |
|
T1 |
1576 |
| auto[1] |
auto[1] |
auto[0] |
2127754 |
1 |
|
|
T23 |
56 |
|
T24 |
160 |
|
T1 |
10319 |
| auto[1] |
auto[1] |
auto[1] |
309722 |
1 |
|
|
T24 |
4 |
|
T1 |
1503 |
|
T11 |
2349 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |