cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58548 |
1 |
|
|
T111 |
1283 |
|
T112 |
841 |
|
T55 |
2361 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51299 |
1 |
|
|
T111 |
31 |
|
T112 |
1317 |
|
T55 |
1034 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58881 |
1 |
|
|
T111 |
419 |
|
T112 |
850 |
|
T55 |
1018 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39842 |
1 |
|
|
T111 |
38 |
|
T112 |
538 |
|
T55 |
904 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T111 |
8 |
|
T112 |
14 |
|
T55 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T111 |
2 |
|
T112 |
25 |
|
T55 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
7 |
|
T112 |
15 |
|
T55 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T111 |
2 |
|
T112 |
24 |
|
T55 |
42 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T111 |
8 |
|
T112 |
14 |
|
T55 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T111 |
2 |
|
T112 |
24 |
|
T55 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
7 |
|
T112 |
15 |
|
T55 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T111 |
2 |
|
T112 |
24 |
|
T55 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T111 |
8 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T111 |
2 |
|
T112 |
23 |
|
T55 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
7 |
|
T112 |
15 |
|
T55 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T111 |
2 |
|
T112 |
24 |
|
T55 |
40 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T111 |
8 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T111 |
2 |
|
T112 |
23 |
|
T55 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
7 |
|
T112 |
15 |
|
T55 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T111 |
2 |
|
T112 |
24 |
|
T55 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T111 |
8 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T111 |
2 |
|
T112 |
23 |
|
T55 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T111 |
7 |
|
T112 |
15 |
|
T55 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T111 |
2 |
|
T112 |
23 |
|
T55 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T111 |
8 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T111 |
2 |
|
T112 |
23 |
|
T55 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T111 |
7 |
|
T112 |
15 |
|
T55 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T111 |
2 |
|
T112 |
23 |
|
T55 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T111 |
2 |
|
T112 |
22 |
|
T55 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T111 |
2 |
|
T112 |
23 |
|
T55 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T111 |
2 |
|
T112 |
21 |
|
T55 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T111 |
2 |
|
T112 |
23 |
|
T55 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T111 |
2 |
|
T112 |
20 |
|
T55 |
33 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T111 |
2 |
|
T112 |
22 |
|
T55 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T111 |
2 |
|
T112 |
19 |
|
T55 |
32 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T111 |
2 |
|
T112 |
21 |
|
T55 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T111 |
2 |
|
T112 |
18 |
|
T55 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T111 |
2 |
|
T112 |
21 |
|
T55 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T111 |
2 |
|
T112 |
18 |
|
T55 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T111 |
2 |
|
T112 |
19 |
|
T55 |
32 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T111 |
2 |
|
T112 |
17 |
|
T55 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T111 |
1 |
|
T112 |
18 |
|
T55 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T111 |
2 |
|
T112 |
17 |
|
T55 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1191 |
1 |
|
|
T111 |
1 |
|
T112 |
18 |
|
T55 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1191 |
1 |
|
|
T111 |
2 |
|
T112 |
17 |
|
T55 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T111 |
1 |
|
T112 |
18 |
|
T55 |
28 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57057 |
1 |
|
|
T111 |
244 |
|
T112 |
1713 |
|
T55 |
2310 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42908 |
1 |
|
|
T111 |
164 |
|
T112 |
494 |
|
T55 |
1012 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59714 |
1 |
|
|
T111 |
1070 |
|
T112 |
627 |
|
T55 |
1099 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48273 |
1 |
|
|
T111 |
174 |
|
T112 |
715 |
|
T55 |
865 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T111 |
9 |
|
T112 |
29 |
|
T55 |
47 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T111 |
5 |
|
T112 |
9 |
|
T55 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T111 |
9 |
|
T112 |
30 |
|
T55 |
45 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
13 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T111 |
9 |
|
T112 |
29 |
|
T55 |
47 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T111 |
5 |
|
T112 |
9 |
|
T55 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T111 |
9 |
|
T112 |
30 |
|
T55 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T111 |
9 |
|
T112 |
29 |
|
T55 |
47 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T111 |
5 |
|
T112 |
9 |
|
T55 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T111 |
9 |
|
T112 |
30 |
|
T55 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T111 |
9 |
|
T112 |
28 |
|
T55 |
47 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T111 |
5 |
|
T112 |
9 |
|
T55 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T111 |
9 |
|
T112 |
30 |
|
T55 |
42 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T111 |
9 |
|
T112 |
28 |
|
T55 |
45 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T111 |
5 |
|
T112 |
9 |
|
T55 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T111 |
9 |
|
T112 |
28 |
|
T55 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T111 |
9 |
|
T112 |
28 |
|
T55 |
45 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T111 |
5 |
|
T112 |
9 |
|
T55 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T111 |
8 |
|
T112 |
26 |
|
T55 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T111 |
9 |
|
T112 |
28 |
|
T55 |
41 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T111 |
5 |
|
T112 |
8 |
|
T55 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T111 |
8 |
|
T112 |
27 |
|
T55 |
38 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T111 |
8 |
|
T112 |
28 |
|
T55 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T111 |
5 |
|
T112 |
8 |
|
T55 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T111 |
8 |
|
T112 |
25 |
|
T55 |
36 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T111 |
8 |
|
T112 |
28 |
|
T55 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T111 |
5 |
|
T112 |
8 |
|
T55 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T111 |
8 |
|
T112 |
23 |
|
T55 |
35 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T111 |
8 |
|
T112 |
28 |
|
T55 |
37 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T111 |
5 |
|
T112 |
8 |
|
T55 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T111 |
7 |
|
T112 |
23 |
|
T55 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T111 |
8 |
|
T112 |
25 |
|
T55 |
37 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T111 |
5 |
|
T112 |
8 |
|
T55 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T111 |
7 |
|
T112 |
23 |
|
T55 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T111 |
8 |
|
T112 |
24 |
|
T55 |
37 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T111 |
5 |
|
T112 |
8 |
|
T55 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T111 |
6 |
|
T112 |
23 |
|
T55 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T111 |
8 |
|
T112 |
24 |
|
T55 |
37 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T111 |
5 |
|
T112 |
8 |
|
T55 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1198 |
1 |
|
|
T111 |
6 |
|
T112 |
22 |
|
T55 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T111 |
8 |
|
T112 |
22 |
|
T55 |
36 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T111 |
5 |
|
T112 |
8 |
|
T55 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T111 |
6 |
|
T112 |
21 |
|
T55 |
32 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T111 |
8 |
|
T112 |
22 |
|
T55 |
36 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T111 |
5 |
|
T112 |
8 |
|
T55 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1142 |
1 |
|
|
T111 |
6 |
|
T112 |
21 |
|
T55 |
32 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53697 |
1 |
|
|
T111 |
86 |
|
T112 |
720 |
|
T55 |
1094 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52983 |
1 |
|
|
T111 |
338 |
|
T112 |
674 |
|
T55 |
760 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53040 |
1 |
|
|
T111 |
125 |
|
T112 |
1409 |
|
T55 |
1400 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47843 |
1 |
|
|
T111 |
1051 |
|
T112 |
759 |
|
T55 |
2081 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T111 |
1 |
|
T112 |
8 |
|
T55 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T111 |
16 |
|
T112 |
31 |
|
T55 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T111 |
15 |
|
T112 |
29 |
|
T55 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T111 |
1 |
|
T112 |
8 |
|
T55 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T111 |
16 |
|
T112 |
30 |
|
T55 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1618 |
1 |
|
|
T111 |
15 |
|
T112 |
28 |
|
T55 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T111 |
1 |
|
T112 |
8 |
|
T55 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T111 |
16 |
|
T112 |
28 |
|
T55 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T111 |
15 |
|
T112 |
27 |
|
T55 |
34 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T111 |
1 |
|
T112 |
8 |
|
T55 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T111 |
16 |
|
T112 |
28 |
|
T55 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T111 |
15 |
|
T112 |
26 |
|
T55 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T111 |
1 |
|
T112 |
8 |
|
T55 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T111 |
15 |
|
T112 |
26 |
|
T55 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T111 |
15 |
|
T112 |
26 |
|
T55 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T111 |
1 |
|
T112 |
8 |
|
T55 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T111 |
15 |
|
T112 |
26 |
|
T55 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T111 |
15 |
|
T112 |
26 |
|
T55 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T112 |
8 |
|
T55 |
20 |
|
T113 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T111 |
15 |
|
T112 |
26 |
|
T55 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T111 |
14 |
|
T112 |
25 |
|
T55 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T112 |
8 |
|
T55 |
20 |
|
T113 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T111 |
15 |
|
T112 |
25 |
|
T55 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T111 |
14 |
|
T112 |
25 |
|
T55 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T112 |
8 |
|
T55 |
20 |
|
T113 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T111 |
15 |
|
T112 |
25 |
|
T55 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T111 |
12 |
|
T112 |
25 |
|
T55 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T112 |
8 |
|
T55 |
20 |
|
T113 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T111 |
14 |
|
T112 |
25 |
|
T55 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T111 |
11 |
|
T112 |
25 |
|
T55 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T112 |
8 |
|
T55 |
20 |
|
T113 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T111 |
13 |
|
T112 |
25 |
|
T55 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T111 |
11 |
|
T112 |
24 |
|
T55 |
29 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T112 |
8 |
|
T55 |
20 |
|
T113 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T111 |
13 |
|
T112 |
25 |
|
T55 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T111 |
11 |
|
T112 |
23 |
|
T55 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T112 |
8 |
|
T55 |
20 |
|
T113 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T111 |
13 |
|
T112 |
25 |
|
T55 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T111 |
9 |
|
T112 |
23 |
|
T55 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T112 |
8 |
|
T55 |
20 |
|
T113 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T111 |
13 |
|
T112 |
24 |
|
T55 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T111 |
9 |
|
T112 |
23 |
|
T55 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T112 |
8 |
|
T55 |
20 |
|
T113 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1222 |
1 |
|
|
T111 |
13 |
|
T112 |
22 |
|
T55 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T111 |
9 |
|
T112 |
23 |
|
T55 |
26 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57776 |
1 |
|
|
T111 |
292 |
|
T112 |
807 |
|
T55 |
1240 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43011 |
1 |
|
|
T111 |
138 |
|
T112 |
534 |
|
T55 |
1904 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60519 |
1 |
|
|
T111 |
1010 |
|
T112 |
763 |
|
T55 |
1266 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46482 |
1 |
|
|
T111 |
270 |
|
T112 |
1378 |
|
T55 |
813 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T111 |
8 |
|
T112 |
30 |
|
T55 |
37 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T111 |
2 |
|
T112 |
12 |
|
T55 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T111 |
10 |
|
T112 |
31 |
|
T55 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
25 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1570 |
1 |
|
|
T111 |
8 |
|
T112 |
30 |
|
T55 |
37 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T111 |
2 |
|
T112 |
12 |
|
T55 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T111 |
10 |
|
T112 |
31 |
|
T55 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T111 |
8 |
|
T112 |
28 |
|
T55 |
37 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T111 |
2 |
|
T112 |
12 |
|
T55 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T111 |
10 |
|
T112 |
31 |
|
T55 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T111 |
8 |
|
T112 |
28 |
|
T55 |
36 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T111 |
2 |
|
T112 |
12 |
|
T55 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T111 |
9 |
|
T112 |
30 |
|
T55 |
37 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T111 |
8 |
|
T112 |
27 |
|
T55 |
36 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T111 |
2 |
|
T112 |
12 |
|
T55 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T111 |
9 |
|
T112 |
29 |
|
T55 |
35 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T111 |
8 |
|
T112 |
25 |
|
T55 |
36 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T111 |
2 |
|
T112 |
12 |
|
T55 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T111 |
9 |
|
T112 |
29 |
|
T55 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T111 |
3 |
|
T112 |
12 |
|
T55 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T111 |
8 |
|
T112 |
22 |
|
T55 |
33 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T111 |
9 |
|
T112 |
30 |
|
T55 |
33 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T111 |
3 |
|
T112 |
12 |
|
T55 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T111 |
8 |
|
T112 |
21 |
|
T55 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T111 |
9 |
|
T112 |
30 |
|
T55 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T111 |
3 |
|
T112 |
12 |
|
T55 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T111 |
8 |
|
T112 |
21 |
|
T55 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T111 |
9 |
|
T112 |
30 |
|
T55 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T111 |
3 |
|
T112 |
12 |
|
T55 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T111 |
8 |
|
T112 |
18 |
|
T55 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T111 |
9 |
|
T112 |
30 |
|
T55 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T111 |
3 |
|
T112 |
12 |
|
T55 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T111 |
8 |
|
T112 |
17 |
|
T55 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T111 |
9 |
|
T112 |
29 |
|
T55 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T111 |
3 |
|
T112 |
12 |
|
T55 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T111 |
9 |
|
T112 |
29 |
|
T55 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T111 |
3 |
|
T112 |
12 |
|
T55 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T111 |
9 |
|
T112 |
29 |
|
T55 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T111 |
3 |
|
T112 |
12 |
|
T55 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1200 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T111 |
9 |
|
T112 |
28 |
|
T55 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T111 |
3 |
|
T112 |
12 |
|
T55 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1173 |
1 |
|
|
T111 |
6 |
|
T112 |
16 |
|
T55 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T111 |
9 |
|
T112 |
27 |
|
T55 |
26 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59143 |
1 |
|
|
T111 |
1109 |
|
T112 |
622 |
|
T55 |
1228 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47412 |
1 |
|
|
T111 |
220 |
|
T112 |
1309 |
|
T55 |
2040 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55908 |
1 |
|
|
T111 |
136 |
|
T112 |
773 |
|
T55 |
1450 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45687 |
1 |
|
|
T111 |
195 |
|
T112 |
813 |
|
T55 |
598 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T111 |
2 |
|
T112 |
13 |
|
T55 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1616 |
1 |
|
|
T111 |
13 |
|
T112 |
28 |
|
T55 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T111 |
12 |
|
T112 |
31 |
|
T55 |
33 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T111 |
2 |
|
T112 |
13 |
|
T55 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T111 |
13 |
|
T112 |
28 |
|
T55 |
34 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T111 |
12 |
|
T112 |
30 |
|
T55 |
31 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T111 |
2 |
|
T112 |
13 |
|
T55 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T111 |
13 |
|
T112 |
28 |
|
T55 |
34 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T111 |
12 |
|
T112 |
29 |
|
T55 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T111 |
2 |
|
T112 |
13 |
|
T55 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T111 |
13 |
|
T112 |
27 |
|
T55 |
34 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T111 |
12 |
|
T112 |
28 |
|
T55 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T111 |
2 |
|
T112 |
13 |
|
T55 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T111 |
12 |
|
T112 |
25 |
|
T55 |
33 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T111 |
12 |
|
T112 |
27 |
|
T55 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T111 |
2 |
|
T112 |
13 |
|
T55 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T111 |
12 |
|
T112 |
24 |
|
T55 |
33 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T111 |
11 |
|
T112 |
26 |
|
T55 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T111 |
2 |
|
T112 |
13 |
|
T55 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T111 |
12 |
|
T112 |
23 |
|
T55 |
31 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T111 |
2 |
|
T112 |
9 |
|
T55 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T111 |
10 |
|
T112 |
27 |
|
T55 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T111 |
2 |
|
T112 |
13 |
|
T55 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T111 |
12 |
|
T112 |
23 |
|
T55 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T111 |
2 |
|
T112 |
9 |
|
T55 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T111 |
10 |
|
T112 |
27 |
|
T55 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T111 |
2 |
|
T112 |
13 |
|
T55 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T111 |
12 |
|
T112 |
22 |
|
T55 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T111 |
2 |
|
T112 |
9 |
|
T55 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T111 |
10 |
|
T112 |
27 |
|
T55 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T111 |
2 |
|
T112 |
13 |
|
T55 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T111 |
11 |
|
T112 |
21 |
|
T55 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T111 |
2 |
|
T112 |
9 |
|
T55 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T111 |
10 |
|
T112 |
26 |
|
T55 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T111 |
2 |
|
T112 |
13 |
|
T55 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T111 |
10 |
|
T112 |
21 |
|
T55 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T111 |
2 |
|
T112 |
9 |
|
T55 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T111 |
10 |
|
T112 |
25 |
|
T55 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T111 |
2 |
|
T112 |
13 |
|
T55 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T111 |
10 |
|
T112 |
21 |
|
T55 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T111 |
2 |
|
T112 |
9 |
|
T55 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T111 |
9 |
|
T112 |
25 |
|
T55 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T111 |
2 |
|
T112 |
13 |
|
T55 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T111 |
9 |
|
T112 |
21 |
|
T55 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T111 |
2 |
|
T112 |
9 |
|
T55 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T111 |
9 |
|
T112 |
24 |
|
T55 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T111 |
2 |
|
T112 |
13 |
|
T55 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1222 |
1 |
|
|
T111 |
8 |
|
T112 |
21 |
|
T55 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T111 |
2 |
|
T112 |
9 |
|
T55 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T111 |
9 |
|
T112 |
24 |
|
T55 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T111 |
2 |
|
T112 |
13 |
|
T55 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T111 |
8 |
|
T112 |
21 |
|
T55 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T111 |
2 |
|
T112 |
9 |
|
T55 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1169 |
1 |
|
|
T111 |
8 |
|
T112 |
24 |
|
T55 |
20 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59522 |
1 |
|
|
T111 |
195 |
|
T112 |
686 |
|
T55 |
1111 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46032 |
1 |
|
|
T111 |
317 |
|
T112 |
925 |
|
T55 |
921 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56400 |
1 |
|
|
T111 |
119 |
|
T112 |
657 |
|
T55 |
1152 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45208 |
1 |
|
|
T111 |
1074 |
|
T112 |
1217 |
|
T55 |
2076 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T111 |
2 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1683 |
1 |
|
|
T111 |
11 |
|
T112 |
29 |
|
T55 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1654 |
1 |
|
|
T111 |
11 |
|
T112 |
31 |
|
T55 |
40 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T111 |
2 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T111 |
11 |
|
T112 |
29 |
|
T55 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T111 |
11 |
|
T112 |
29 |
|
T55 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T111 |
2 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T111 |
11 |
|
T112 |
29 |
|
T55 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T111 |
11 |
|
T112 |
28 |
|
T55 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T111 |
2 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T111 |
11 |
|
T112 |
28 |
|
T55 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T111 |
10 |
|
T112 |
28 |
|
T55 |
36 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T111 |
2 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T111 |
11 |
|
T112 |
28 |
|
T55 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T111 |
10 |
|
T112 |
27 |
|
T55 |
35 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T111 |
2 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T111 |
11 |
|
T112 |
27 |
|
T55 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T111 |
8 |
|
T112 |
27 |
|
T55 |
35 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T111 |
1 |
|
T112 |
12 |
|
T55 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T111 |
11 |
|
T112 |
27 |
|
T55 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T111 |
8 |
|
T112 |
26 |
|
T55 |
34 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T111 |
1 |
|
T112 |
12 |
|
T55 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T111 |
11 |
|
T112 |
26 |
|
T55 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T111 |
8 |
|
T112 |
24 |
|
T55 |
32 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T111 |
1 |
|
T112 |
12 |
|
T55 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T111 |
11 |
|
T112 |
26 |
|
T55 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T111 |
8 |
|
T112 |
23 |
|
T55 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T111 |
1 |
|
T112 |
12 |
|
T55 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T111 |
11 |
|
T112 |
25 |
|
T55 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T111 |
8 |
|
T112 |
23 |
|
T55 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T111 |
1 |
|
T112 |
12 |
|
T55 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T111 |
11 |
|
T112 |
25 |
|
T55 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T111 |
7 |
|
T112 |
23 |
|
T55 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T111 |
1 |
|
T112 |
12 |
|
T55 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T111 |
11 |
|
T112 |
25 |
|
T55 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T111 |
6 |
|
T112 |
23 |
|
T55 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T111 |
1 |
|
T112 |
12 |
|
T55 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T111 |
11 |
|
T112 |
25 |
|
T55 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T111 |
6 |
|
T112 |
23 |
|
T55 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T111 |
1 |
|
T112 |
12 |
|
T55 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T111 |
11 |
|
T112 |
25 |
|
T55 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T111 |
6 |
|
T112 |
23 |
|
T55 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T111 |
1 |
|
T112 |
12 |
|
T55 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T111 |
11 |
|
T112 |
23 |
|
T55 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T111 |
2 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T111 |
5 |
|
T112 |
22 |
|
T55 |
23 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57499 |
1 |
|
|
T111 |
209 |
|
T112 |
1790 |
|
T55 |
710 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
38627 |
1 |
|
|
T111 |
133 |
|
T112 |
642 |
|
T55 |
1993 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62084 |
1 |
|
|
T111 |
1296 |
|
T112 |
526 |
|
T55 |
1562 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49032 |
1 |
|
|
T111 |
113 |
|
T112 |
553 |
|
T55 |
978 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T111 |
5 |
|
T112 |
29 |
|
T55 |
49 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T111 |
6 |
|
T112 |
13 |
|
T55 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1664 |
1 |
|
|
T111 |
4 |
|
T112 |
27 |
|
T55 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T111 |
5 |
|
T112 |
29 |
|
T55 |
49 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T111 |
6 |
|
T112 |
13 |
|
T55 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T111 |
4 |
|
T112 |
27 |
|
T55 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T111 |
5 |
|
T112 |
29 |
|
T55 |
49 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T111 |
6 |
|
T112 |
13 |
|
T55 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T111 |
4 |
|
T112 |
27 |
|
T55 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T111 |
5 |
|
T112 |
29 |
|
T55 |
49 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T111 |
6 |
|
T112 |
13 |
|
T55 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T111 |
4 |
|
T112 |
27 |
|
T55 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T111 |
5 |
|
T112 |
28 |
|
T55 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T111 |
6 |
|
T112 |
13 |
|
T55 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T111 |
4 |
|
T112 |
25 |
|
T55 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T111 |
5 |
|
T112 |
28 |
|
T55 |
47 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T111 |
6 |
|
T112 |
13 |
|
T55 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T111 |
4 |
|
T112 |
25 |
|
T55 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T111 |
5 |
|
T112 |
27 |
|
T55 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T111 |
6 |
|
T112 |
12 |
|
T55 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T111 |
4 |
|
T112 |
26 |
|
T55 |
37 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T111 |
5 |
|
T112 |
26 |
|
T55 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T111 |
6 |
|
T112 |
12 |
|
T55 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T111 |
4 |
|
T112 |
25 |
|
T55 |
37 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T111 |
5 |
|
T112 |
25 |
|
T55 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T111 |
6 |
|
T112 |
12 |
|
T55 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T111 |
3 |
|
T112 |
25 |
|
T55 |
34 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T111 |
5 |
|
T112 |
23 |
|
T55 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T111 |
6 |
|
T112 |
12 |
|
T55 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T111 |
3 |
|
T112 |
24 |
|
T55 |
34 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T111 |
5 |
|
T112 |
22 |
|
T55 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
6 |
|
T112 |
12 |
|
T55 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T111 |
3 |
|
T112 |
23 |
|
T55 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T111 |
5 |
|
T112 |
22 |
|
T55 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
6 |
|
T112 |
12 |
|
T55 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T111 |
3 |
|
T112 |
22 |
|
T55 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T111 |
5 |
|
T112 |
22 |
|
T55 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
6 |
|
T112 |
12 |
|
T55 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T111 |
3 |
|
T112 |
21 |
|
T55 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T111 |
5 |
|
T112 |
21 |
|
T55 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
6 |
|
T112 |
12 |
|
T55 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T111 |
3 |
|
T112 |
21 |
|
T55 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T111 |
5 |
|
T112 |
20 |
|
T55 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T111 |
6 |
|
T112 |
12 |
|
T55 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T111 |
3 |
|
T112 |
20 |
|
T55 |
32 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60743 |
1 |
|
|
T111 |
235 |
|
T112 |
617 |
|
T55 |
2404 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45303 |
1 |
|
|
T111 |
178 |
|
T112 |
1301 |
|
T55 |
929 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55059 |
1 |
|
|
T111 |
261 |
|
T112 |
809 |
|
T55 |
1089 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46386 |
1 |
|
|
T111 |
1061 |
|
T112 |
647 |
|
T55 |
776 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1682 |
1 |
|
|
T111 |
9 |
|
T112 |
31 |
|
T55 |
40 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T111 |
3 |
|
T112 |
17 |
|
T55 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1654 |
1 |
|
|
T111 |
8 |
|
T112 |
29 |
|
T55 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T111 |
9 |
|
T112 |
29 |
|
T55 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T111 |
3 |
|
T112 |
17 |
|
T55 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T111 |
8 |
|
T112 |
29 |
|
T55 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T111 |
9 |
|
T112 |
29 |
|
T55 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T111 |
3 |
|
T112 |
17 |
|
T55 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T111 |
8 |
|
T112 |
29 |
|
T55 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T111 |
9 |
|
T112 |
29 |
|
T55 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T111 |
3 |
|
T112 |
17 |
|
T55 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T111 |
8 |
|
T112 |
27 |
|
T55 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T111 |
9 |
|
T112 |
28 |
|
T55 |
37 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T111 |
3 |
|
T112 |
17 |
|
T55 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T111 |
8 |
|
T112 |
27 |
|
T55 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T111 |
9 |
|
T112 |
27 |
|
T55 |
36 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T111 |
3 |
|
T112 |
17 |
|
T55 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T111 |
7 |
|
T112 |
27 |
|
T55 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T111 |
1 |
|
T112 |
15 |
|
T55 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T111 |
9 |
|
T112 |
26 |
|
T55 |
36 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T111 |
3 |
|
T112 |
16 |
|
T55 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T111 |
7 |
|
T112 |
27 |
|
T55 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T111 |
1 |
|
T112 |
15 |
|
T55 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T111 |
9 |
|
T112 |
25 |
|
T55 |
34 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T111 |
3 |
|
T112 |
16 |
|
T55 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T111 |
7 |
|
T112 |
25 |
|
T55 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T111 |
1 |
|
T112 |
15 |
|
T55 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T111 |
9 |
|
T112 |
25 |
|
T55 |
34 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T111 |
3 |
|
T112 |
16 |
|
T55 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T111 |
7 |
|
T112 |
25 |
|
T55 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T111 |
1 |
|
T112 |
15 |
|
T55 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T111 |
9 |
|
T112 |
24 |
|
T55 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T111 |
3 |
|
T112 |
16 |
|
T55 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T111 |
7 |
|
T112 |
24 |
|
T55 |
35 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T111 |
1 |
|
T112 |
15 |
|
T55 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T111 |
9 |
|
T112 |
24 |
|
T55 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T111 |
3 |
|
T112 |
16 |
|
T55 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T111 |
7 |
|
T112 |
21 |
|
T55 |
33 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T111 |
1 |
|
T112 |
15 |
|
T55 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T111 |
9 |
|
T112 |
24 |
|
T55 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T111 |
3 |
|
T112 |
16 |
|
T55 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T111 |
7 |
|
T112 |
21 |
|
T55 |
33 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T111 |
1 |
|
T112 |
15 |
|
T55 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T111 |
9 |
|
T112 |
24 |
|
T55 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T111 |
3 |
|
T112 |
16 |
|
T55 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T111 |
7 |
|
T112 |
21 |
|
T55 |
32 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T111 |
1 |
|
T112 |
15 |
|
T55 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T111 |
8 |
|
T112 |
22 |
|
T55 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T111 |
3 |
|
T112 |
16 |
|
T55 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T111 |
7 |
|
T112 |
21 |
|
T55 |
32 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T111 |
1 |
|
T112 |
15 |
|
T55 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T111 |
8 |
|
T112 |
21 |
|
T55 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T111 |
3 |
|
T112 |
16 |
|
T55 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T111 |
7 |
|
T112 |
21 |
|
T55 |
30 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56208 |
1 |
|
|
T111 |
302 |
|
T112 |
931 |
|
T55 |
2398 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50018 |
1 |
|
|
T111 |
922 |
|
T112 |
574 |
|
T55 |
829 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53267 |
1 |
|
|
T111 |
403 |
|
T112 |
1544 |
|
T55 |
1027 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47625 |
1 |
|
|
T111 |
177 |
|
T112 |
522 |
|
T55 |
925 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1686 |
1 |
|
|
T111 |
5 |
|
T112 |
24 |
|
T55 |
43 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1683 |
1 |
|
|
T111 |
5 |
|
T112 |
24 |
|
T55 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T111 |
5 |
|
T112 |
23 |
|
T55 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T111 |
5 |
|
T112 |
23 |
|
T55 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T111 |
5 |
|
T112 |
22 |
|
T55 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T111 |
5 |
|
T112 |
23 |
|
T55 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T111 |
5 |
|
T112 |
21 |
|
T55 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T111 |
4 |
|
T112 |
23 |
|
T55 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T111 |
5 |
|
T112 |
21 |
|
T55 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T111 |
4 |
|
T112 |
23 |
|
T55 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T111 |
5 |
|
T112 |
21 |
|
T55 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T111 |
4 |
|
T112 |
23 |
|
T55 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T111 |
5 |
|
T112 |
21 |
|
T55 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T111 |
3 |
|
T112 |
13 |
|
T55 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T111 |
4 |
|
T112 |
24 |
|
T55 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T111 |
5 |
|
T112 |
21 |
|
T55 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T111 |
3 |
|
T112 |
13 |
|
T55 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T111 |
4 |
|
T112 |
23 |
|
T55 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T111 |
5 |
|
T112 |
21 |
|
T55 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T111 |
3 |
|
T112 |
13 |
|
T55 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T111 |
4 |
|
T112 |
23 |
|
T55 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T111 |
5 |
|
T112 |
20 |
|
T55 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T111 |
3 |
|
T112 |
13 |
|
T55 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T111 |
4 |
|
T112 |
23 |
|
T55 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T111 |
5 |
|
T112 |
20 |
|
T55 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T111 |
3 |
|
T112 |
13 |
|
T55 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T111 |
4 |
|
T112 |
21 |
|
T55 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T111 |
5 |
|
T112 |
19 |
|
T55 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T111 |
3 |
|
T112 |
13 |
|
T55 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T111 |
4 |
|
T112 |
21 |
|
T55 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T111 |
5 |
|
T112 |
17 |
|
T55 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T111 |
3 |
|
T112 |
13 |
|
T55 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T111 |
3 |
|
T112 |
21 |
|
T55 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T111 |
5 |
|
T112 |
16 |
|
T55 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T111 |
3 |
|
T112 |
13 |
|
T55 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T111 |
3 |
|
T112 |
21 |
|
T55 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T111 |
5 |
|
T112 |
16 |
|
T55 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T111 |
3 |
|
T112 |
13 |
|
T55 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T111 |
3 |
|
T112 |
21 |
|
T55 |
38 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56829 |
1 |
|
|
T111 |
330 |
|
T112 |
901 |
|
T55 |
1489 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45714 |
1 |
|
|
T111 |
162 |
|
T112 |
404 |
|
T55 |
971 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54739 |
1 |
|
|
T111 |
1010 |
|
T112 |
1464 |
|
T55 |
1225 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50849 |
1 |
|
|
T111 |
180 |
|
T112 |
815 |
|
T55 |
1669 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T111 |
8 |
|
T112 |
24 |
|
T55 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T111 |
9 |
|
T112 |
26 |
|
T55 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T111 |
7 |
|
T112 |
24 |
|
T55 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T111 |
9 |
|
T112 |
26 |
|
T55 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T111 |
7 |
|
T112 |
24 |
|
T55 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T111 |
9 |
|
T112 |
25 |
|
T55 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T111 |
7 |
|
T112 |
24 |
|
T55 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T111 |
9 |
|
T112 |
25 |
|
T55 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T111 |
7 |
|
T112 |
23 |
|
T55 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T111 |
9 |
|
T112 |
25 |
|
T55 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T111 |
7 |
|
T112 |
23 |
|
T55 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T111 |
8 |
|
T112 |
25 |
|
T55 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T111 |
7 |
|
T112 |
21 |
|
T55 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T111 |
8 |
|
T112 |
23 |
|
T55 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T111 |
7 |
|
T112 |
19 |
|
T55 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T111 |
8 |
|
T112 |
23 |
|
T55 |
32 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T111 |
7 |
|
T112 |
19 |
|
T55 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T111 |
8 |
|
T112 |
23 |
|
T55 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T111 |
7 |
|
T112 |
19 |
|
T55 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T111 |
8 |
|
T112 |
23 |
|
T55 |
26 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T111 |
7 |
|
T112 |
18 |
|
T55 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T111 |
8 |
|
T112 |
22 |
|
T55 |
26 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T111 |
8 |
|
T112 |
22 |
|
T55 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T111 |
7 |
|
T112 |
22 |
|
T55 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1170 |
1 |
|
|
T111 |
7 |
|
T112 |
21 |
|
T55 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1182 |
1 |
|
|
T111 |
6 |
|
T112 |
15 |
|
T55 |
32 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1139 |
1 |
|
|
T111 |
7 |
|
T112 |
21 |
|
T55 |
19 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53463 |
1 |
|
|
T111 |
264 |
|
T112 |
1403 |
|
T55 |
619 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
53017 |
1 |
|
|
T111 |
989 |
|
T112 |
681 |
|
T55 |
1377 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53872 |
1 |
|
|
T111 |
286 |
|
T112 |
810 |
|
T55 |
922 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46765 |
1 |
|
|
T111 |
172 |
|
T112 |
607 |
|
T55 |
2137 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1707 |
1 |
|
|
T111 |
10 |
|
T112 |
26 |
|
T55 |
57 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1703 |
1 |
|
|
T111 |
9 |
|
T112 |
25 |
|
T55 |
57 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1680 |
1 |
|
|
T111 |
10 |
|
T112 |
26 |
|
T55 |
56 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1671 |
1 |
|
|
T111 |
9 |
|
T112 |
24 |
|
T55 |
54 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T111 |
10 |
|
T112 |
26 |
|
T55 |
56 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T111 |
8 |
|
T112 |
22 |
|
T55 |
54 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T111 |
10 |
|
T112 |
26 |
|
T55 |
55 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T111 |
8 |
|
T112 |
22 |
|
T55 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T111 |
9 |
|
T112 |
26 |
|
T55 |
55 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T111 |
7 |
|
T112 |
21 |
|
T55 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T111 |
9 |
|
T112 |
25 |
|
T55 |
54 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T111 |
7 |
|
T112 |
21 |
|
T55 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T111 |
9 |
|
T112 |
25 |
|
T55 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T111 |
7 |
|
T112 |
21 |
|
T55 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T111 |
9 |
|
T112 |
25 |
|
T55 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T111 |
7 |
|
T112 |
20 |
|
T55 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T111 |
9 |
|
T112 |
25 |
|
T55 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T111 |
7 |
|
T112 |
20 |
|
T55 |
45 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T111 |
9 |
|
T112 |
25 |
|
T55 |
51 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T111 |
7 |
|
T112 |
20 |
|
T55 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T111 |
9 |
|
T112 |
25 |
|
T55 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T111 |
6 |
|
T112 |
19 |
|
T55 |
43 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T111 |
9 |
|
T112 |
25 |
|
T55 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T111 |
6 |
|
T112 |
18 |
|
T55 |
43 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T111 |
9 |
|
T112 |
24 |
|
T55 |
44 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T111 |
6 |
|
T112 |
16 |
|
T55 |
43 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T111 |
8 |
|
T112 |
24 |
|
T55 |
43 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T111 |
6 |
|
T112 |
16 |
|
T55 |
43 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T111 |
8 |
|
T112 |
24 |
|
T55 |
43 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T111 |
6 |
|
T112 |
14 |
|
T55 |
39 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52772 |
1 |
|
|
T111 |
239 |
|
T112 |
1259 |
|
T55 |
1003 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46819 |
1 |
|
|
T111 |
134 |
|
T112 |
701 |
|
T55 |
881 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61204 |
1 |
|
|
T111 |
1179 |
|
T112 |
1427 |
|
T55 |
2377 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47290 |
1 |
|
|
T111 |
122 |
|
T112 |
308 |
|
T55 |
863 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T111 |
9 |
|
T112 |
20 |
|
T55 |
46 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T111 |
7 |
|
T112 |
13 |
|
T55 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T111 |
7 |
|
T112 |
21 |
|
T55 |
43 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T111 |
9 |
|
T112 |
20 |
|
T55 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T111 |
7 |
|
T112 |
13 |
|
T55 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T111 |
7 |
|
T112 |
21 |
|
T55 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T111 |
9 |
|
T112 |
20 |
|
T55 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T111 |
7 |
|
T112 |
13 |
|
T55 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T111 |
7 |
|
T112 |
21 |
|
T55 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T111 |
9 |
|
T112 |
20 |
|
T55 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T111 |
7 |
|
T112 |
13 |
|
T55 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T111 |
7 |
|
T112 |
19 |
|
T55 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T111 |
8 |
|
T112 |
20 |
|
T55 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T111 |
7 |
|
T112 |
13 |
|
T55 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T111 |
7 |
|
T112 |
18 |
|
T55 |
41 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T111 |
8 |
|
T112 |
19 |
|
T55 |
43 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T111 |
7 |
|
T112 |
13 |
|
T55 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T111 |
7 |
|
T112 |
18 |
|
T55 |
40 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T111 |
8 |
|
T112 |
18 |
|
T55 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T111 |
7 |
|
T112 |
12 |
|
T55 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T111 |
7 |
|
T112 |
18 |
|
T55 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T111 |
8 |
|
T112 |
18 |
|
T55 |
41 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T111 |
7 |
|
T112 |
12 |
|
T55 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T111 |
5 |
|
T112 |
17 |
|
T55 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T111 |
7 |
|
T112 |
18 |
|
T55 |
40 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T111 |
7 |
|
T112 |
12 |
|
T55 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T111 |
4 |
|
T112 |
17 |
|
T55 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T111 |
7 |
|
T112 |
17 |
|
T55 |
40 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T111 |
7 |
|
T112 |
12 |
|
T55 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T111 |
4 |
|
T112 |
17 |
|
T55 |
37 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T111 |
7 |
|
T112 |
12 |
|
T55 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T111 |
4 |
|
T112 |
17 |
|
T55 |
36 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T111 |
7 |
|
T112 |
15 |
|
T55 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T111 |
7 |
|
T112 |
12 |
|
T55 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T111 |
4 |
|
T112 |
16 |
|
T55 |
35 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T111 |
7 |
|
T112 |
15 |
|
T55 |
37 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T111 |
7 |
|
T112 |
12 |
|
T55 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T111 |
4 |
|
T112 |
15 |
|
T55 |
35 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T111 |
7 |
|
T112 |
15 |
|
T55 |
36 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T111 |
7 |
|
T112 |
12 |
|
T55 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T111 |
4 |
|
T112 |
15 |
|
T55 |
35 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1201 |
1 |
|
|
T111 |
7 |
|
T112 |
15 |
|
T55 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T111 |
7 |
|
T112 |
12 |
|
T55 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1162 |
1 |
|
|
T111 |
4 |
|
T112 |
15 |
|
T55 |
34 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57268 |
1 |
|
|
T111 |
228 |
|
T112 |
473 |
|
T55 |
1159 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46464 |
1 |
|
|
T111 |
133 |
|
T112 |
674 |
|
T55 |
852 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58848 |
1 |
|
|
T111 |
1165 |
|
T112 |
1164 |
|
T55 |
2251 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44642 |
1 |
|
|
T111 |
173 |
|
T112 |
948 |
|
T55 |
869 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T111 |
6 |
|
T112 |
9 |
|
T55 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1707 |
1 |
|
|
T111 |
6 |
|
T112 |
41 |
|
T55 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T111 |
4 |
|
T112 |
7 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1690 |
1 |
|
|
T111 |
8 |
|
T112 |
44 |
|
T55 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T111 |
6 |
|
T112 |
9 |
|
T55 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1662 |
1 |
|
|
T111 |
6 |
|
T112 |
38 |
|
T55 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T111 |
4 |
|
T112 |
7 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T111 |
8 |
|
T112 |
43 |
|
T55 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T111 |
6 |
|
T112 |
9 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T111 |
6 |
|
T112 |
37 |
|
T55 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T111 |
4 |
|
T112 |
7 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T111 |
8 |
|
T112 |
43 |
|
T55 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T111 |
6 |
|
T112 |
9 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T111 |
6 |
|
T112 |
36 |
|
T55 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T111 |
4 |
|
T112 |
7 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T111 |
8 |
|
T112 |
43 |
|
T55 |
45 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T111 |
6 |
|
T112 |
9 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T111 |
5 |
|
T112 |
36 |
|
T55 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T111 |
4 |
|
T112 |
7 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T111 |
8 |
|
T112 |
42 |
|
T55 |
43 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T111 |
6 |
|
T112 |
9 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T111 |
5 |
|
T112 |
34 |
|
T55 |
43 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T111 |
4 |
|
T112 |
7 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T111 |
8 |
|
T112 |
41 |
|
T55 |
41 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T111 |
6 |
|
T112 |
9 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T111 |
5 |
|
T112 |
34 |
|
T55 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T111 |
4 |
|
T112 |
6 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T111 |
8 |
|
T112 |
42 |
|
T55 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T111 |
6 |
|
T112 |
9 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T111 |
5 |
|
T112 |
34 |
|
T55 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T111 |
4 |
|
T112 |
6 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T111 |
8 |
|
T112 |
42 |
|
T55 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T111 |
6 |
|
T112 |
9 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T111 |
5 |
|
T112 |
33 |
|
T55 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T111 |
4 |
|
T112 |
6 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T111 |
8 |
|
T112 |
42 |
|
T55 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T111 |
6 |
|
T112 |
9 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T111 |
5 |
|
T112 |
32 |
|
T55 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T111 |
4 |
|
T112 |
6 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T111 |
8 |
|
T112 |
42 |
|
T55 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T111 |
6 |
|
T112 |
9 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T111 |
5 |
|
T112 |
30 |
|
T55 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T111 |
4 |
|
T112 |
6 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T111 |
8 |
|
T112 |
42 |
|
T55 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T111 |
6 |
|
T112 |
9 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T111 |
5 |
|
T112 |
29 |
|
T55 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T111 |
4 |
|
T112 |
6 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T111 |
8 |
|
T112 |
40 |
|
T55 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T111 |
6 |
|
T112 |
9 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T111 |
4 |
|
T112 |
28 |
|
T55 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T111 |
4 |
|
T112 |
6 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T111 |
8 |
|
T112 |
39 |
|
T55 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T111 |
6 |
|
T112 |
9 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T111 |
4 |
|
T112 |
27 |
|
T55 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T111 |
4 |
|
T112 |
6 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T111 |
8 |
|
T112 |
38 |
|
T55 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T111 |
6 |
|
T112 |
9 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T111 |
3 |
|
T112 |
27 |
|
T55 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T111 |
4 |
|
T112 |
6 |
|
T55 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T111 |
8 |
|
T112 |
38 |
|
T55 |
31 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58599 |
1 |
|
|
T111 |
160 |
|
T112 |
990 |
|
T55 |
1118 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46821 |
1 |
|
|
T111 |
983 |
|
T112 |
524 |
|
T55 |
631 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52295 |
1 |
|
|
T111 |
257 |
|
T112 |
876 |
|
T55 |
2328 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49632 |
1 |
|
|
T111 |
207 |
|
T112 |
1152 |
|
T55 |
961 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1684 |
1 |
|
|
T111 |
12 |
|
T112 |
26 |
|
T55 |
47 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1682 |
1 |
|
|
T111 |
11 |
|
T112 |
28 |
|
T55 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T111 |
12 |
|
T112 |
26 |
|
T55 |
47 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T111 |
11 |
|
T112 |
27 |
|
T55 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T111 |
12 |
|
T112 |
25 |
|
T55 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T111 |
11 |
|
T112 |
26 |
|
T55 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T111 |
12 |
|
T112 |
25 |
|
T55 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T111 |
11 |
|
T112 |
26 |
|
T55 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T111 |
12 |
|
T112 |
25 |
|
T55 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T111 |
11 |
|
T112 |
24 |
|
T55 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T111 |
12 |
|
T112 |
24 |
|
T55 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T111 |
9 |
|
T112 |
23 |
|
T55 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T111 |
12 |
|
T112 |
23 |
|
T55 |
42 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T111 |
9 |
|
T112 |
23 |
|
T55 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T111 |
10 |
|
T112 |
23 |
|
T55 |
42 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T111 |
9 |
|
T112 |
23 |
|
T55 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T111 |
9 |
|
T112 |
23 |
|
T55 |
41 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T111 |
9 |
|
T112 |
21 |
|
T55 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T111 |
9 |
|
T112 |
23 |
|
T55 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T111 |
8 |
|
T112 |
21 |
|
T55 |
34 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T111 |
8 |
|
T112 |
23 |
|
T55 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T111 |
8 |
|
T112 |
21 |
|
T55 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T111 |
8 |
|
T112 |
23 |
|
T55 |
36 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T111 |
8 |
|
T112 |
21 |
|
T55 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T111 |
8 |
|
T112 |
22 |
|
T55 |
34 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T111 |
7 |
|
T112 |
21 |
|
T55 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T111 |
8 |
|
T112 |
22 |
|
T55 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T111 |
7 |
|
T112 |
20 |
|
T55 |
32 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T111 |
8 |
|
T112 |
19 |
|
T55 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T111 |
6 |
|
T112 |
18 |
|
T55 |
32 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59515 |
1 |
|
|
T111 |
327 |
|
T112 |
1611 |
|
T55 |
2621 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43092 |
1 |
|
|
T111 |
137 |
|
T112 |
478 |
|
T55 |
692 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56361 |
1 |
|
|
T111 |
232 |
|
T112 |
1030 |
|
T55 |
1081 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48588 |
1 |
|
|
T111 |
1027 |
|
T112 |
486 |
|
T55 |
838 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T111 |
5 |
|
T112 |
18 |
|
T55 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1656 |
1 |
|
|
T111 |
7 |
|
T112 |
19 |
|
T55 |
35 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T111 |
4 |
|
T112 |
14 |
|
T55 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T111 |
8 |
|
T112 |
23 |
|
T55 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T111 |
5 |
|
T112 |
18 |
|
T55 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T111 |
6 |
|
T112 |
19 |
|
T55 |
35 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T111 |
4 |
|
T112 |
14 |
|
T55 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T111 |
8 |
|
T112 |
22 |
|
T55 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T111 |
5 |
|
T112 |
18 |
|
T55 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T111 |
6 |
|
T112 |
18 |
|
T55 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T111 |
4 |
|
T112 |
14 |
|
T55 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T111 |
8 |
|
T112 |
21 |
|
T55 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T111 |
5 |
|
T112 |
18 |
|
T55 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T111 |
6 |
|
T112 |
17 |
|
T55 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T111 |
4 |
|
T112 |
14 |
|
T55 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T111 |
8 |
|
T112 |
21 |
|
T55 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T111 |
5 |
|
T112 |
18 |
|
T55 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T111 |
6 |
|
T112 |
16 |
|
T55 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T111 |
4 |
|
T112 |
14 |
|
T55 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T111 |
8 |
|
T112 |
21 |
|
T55 |
36 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T111 |
5 |
|
T112 |
18 |
|
T55 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T111 |
6 |
|
T112 |
14 |
|
T55 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T111 |
4 |
|
T112 |
14 |
|
T55 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T111 |
8 |
|
T112 |
20 |
|
T55 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T111 |
5 |
|
T112 |
18 |
|
T55 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T111 |
6 |
|
T112 |
14 |
|
T55 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T111 |
7 |
|
T112 |
21 |
|
T55 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T111 |
5 |
|
T112 |
18 |
|
T55 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T111 |
6 |
|
T112 |
14 |
|
T55 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T111 |
6 |
|
T112 |
21 |
|
T55 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T111 |
5 |
|
T112 |
18 |
|
T55 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T111 |
6 |
|
T112 |
14 |
|
T55 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T111 |
6 |
|
T112 |
21 |
|
T55 |
32 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T111 |
5 |
|
T112 |
18 |
|
T55 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T111 |
6 |
|
T112 |
14 |
|
T55 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T111 |
6 |
|
T112 |
21 |
|
T55 |
32 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T111 |
5 |
|
T112 |
18 |
|
T55 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T111 |
6 |
|
T112 |
14 |
|
T55 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T111 |
6 |
|
T112 |
20 |
|
T55 |
32 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T111 |
5 |
|
T112 |
18 |
|
T55 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T111 |
5 |
|
T112 |
20 |
|
T55 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T111 |
5 |
|
T112 |
18 |
|
T55 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T111 |
5 |
|
T112 |
20 |
|
T55 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T111 |
5 |
|
T112 |
18 |
|
T55 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1245 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T111 |
5 |
|
T112 |
19 |
|
T55 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T111 |
5 |
|
T112 |
18 |
|
T55 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T111 |
5 |
|
T112 |
9 |
|
T55 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T111 |
4 |
|
T112 |
13 |
|
T55 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T111 |
5 |
|
T112 |
18 |
|
T55 |
27 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55714 |
1 |
|
|
T111 |
349 |
|
T112 |
935 |
|
T55 |
853 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42099 |
1 |
|
|
T111 |
210 |
|
T112 |
609 |
|
T55 |
863 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59421 |
1 |
|
|
T111 |
124 |
|
T112 |
1325 |
|
T55 |
1143 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50605 |
1 |
|
|
T111 |
987 |
|
T112 |
615 |
|
T55 |
2184 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T111 |
6 |
|
T112 |
8 |
|
T55 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T111 |
7 |
|
T112 |
34 |
|
T55 |
51 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1644 |
1 |
|
|
T111 |
8 |
|
T112 |
29 |
|
T55 |
55 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T111 |
6 |
|
T112 |
8 |
|
T55 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T111 |
7 |
|
T112 |
32 |
|
T55 |
51 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T111 |
8 |
|
T112 |
28 |
|
T55 |
54 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T111 |
6 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T111 |
7 |
|
T112 |
32 |
|
T55 |
51 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T111 |
8 |
|
T112 |
28 |
|
T55 |
54 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T111 |
6 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T111 |
7 |
|
T112 |
30 |
|
T55 |
51 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T111 |
7 |
|
T112 |
28 |
|
T55 |
54 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T111 |
6 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T111 |
7 |
|
T112 |
29 |
|
T55 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T111 |
7 |
|
T112 |
27 |
|
T55 |
54 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T111 |
6 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T111 |
7 |
|
T112 |
29 |
|
T55 |
47 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T111 |
7 |
|
T112 |
27 |
|
T55 |
53 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T111 |
6 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T111 |
7 |
|
T112 |
29 |
|
T55 |
44 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T111 |
7 |
|
T112 |
27 |
|
T55 |
53 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T111 |
6 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T111 |
7 |
|
T112 |
28 |
|
T55 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T111 |
7 |
|
T112 |
27 |
|
T55 |
52 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T111 |
6 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T111 |
7 |
|
T112 |
28 |
|
T55 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T111 |
7 |
|
T112 |
27 |
|
T55 |
51 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T111 |
6 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T111 |
7 |
|
T112 |
25 |
|
T55 |
41 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T111 |
7 |
|
T112 |
26 |
|
T55 |
49 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T111 |
6 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T111 |
7 |
|
T112 |
25 |
|
T55 |
41 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T111 |
7 |
|
T112 |
24 |
|
T55 |
47 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T111 |
6 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T111 |
7 |
|
T112 |
25 |
|
T55 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T111 |
7 |
|
T112 |
23 |
|
T55 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T111 |
6 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T111 |
7 |
|
T112 |
25 |
|
T55 |
36 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T111 |
6 |
|
T112 |
21 |
|
T55 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T111 |
6 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T111 |
7 |
|
T112 |
25 |
|
T55 |
35 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T111 |
6 |
|
T112 |
20 |
|
T55 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T111 |
6 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T111 |
6 |
|
T112 |
24 |
|
T55 |
34 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T111 |
5 |
|
T112 |
13 |
|
T55 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1195 |
1 |
|
|
T111 |
6 |
|
T112 |
20 |
|
T55 |
41 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60855 |
1 |
|
|
T111 |
341 |
|
T112 |
1797 |
|
T55 |
1188 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44163 |
1 |
|
|
T111 |
107 |
|
T112 |
550 |
|
T55 |
919 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55239 |
1 |
|
|
T111 |
1082 |
|
T112 |
678 |
|
T55 |
2261 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47620 |
1 |
|
|
T111 |
206 |
|
T112 |
572 |
|
T55 |
840 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T111 |
7 |
|
T112 |
26 |
|
T55 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T111 |
7 |
|
T112 |
27 |
|
T55 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T111 |
7 |
|
T112 |
26 |
|
T55 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T111 |
7 |
|
T112 |
25 |
|
T55 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T111 |
7 |
|
T112 |
26 |
|
T55 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T111 |
7 |
|
T112 |
23 |
|
T55 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T111 |
7 |
|
T112 |
25 |
|
T55 |
42 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T111 |
7 |
|
T112 |
23 |
|
T55 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T111 |
7 |
|
T112 |
24 |
|
T55 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T111 |
7 |
|
T112 |
23 |
|
T55 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T111 |
7 |
|
T112 |
23 |
|
T55 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T111 |
7 |
|
T112 |
22 |
|
T55 |
37 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T111 |
7 |
|
T112 |
22 |
|
T55 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T111 |
7 |
|
T112 |
22 |
|
T55 |
36 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T111 |
5 |
|
T112 |
22 |
|
T55 |
39 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T111 |
7 |
|
T112 |
22 |
|
T55 |
34 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T111 |
5 |
|
T112 |
21 |
|
T55 |
39 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T111 |
7 |
|
T112 |
22 |
|
T55 |
33 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T111 |
5 |
|
T112 |
21 |
|
T55 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T111 |
6 |
|
T112 |
21 |
|
T55 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T111 |
5 |
|
T112 |
21 |
|
T55 |
37 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T111 |
6 |
|
T112 |
21 |
|
T55 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T111 |
5 |
|
T112 |
20 |
|
T55 |
36 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T111 |
6 |
|
T112 |
20 |
|
T55 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T111 |
5 |
|
T112 |
20 |
|
T55 |
36 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T111 |
6 |
|
T112 |
20 |
|
T55 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T111 |
5 |
|
T112 |
20 |
|
T55 |
36 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T111 |
6 |
|
T112 |
19 |
|
T55 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1167 |
1 |
|
|
T111 |
5 |
|
T112 |
19 |
|
T55 |
35 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T111 |
6 |
|
T112 |
19 |
|
T55 |
28 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53332 |
1 |
|
|
T111 |
1181 |
|
T112 |
887 |
|
T55 |
1070 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47749 |
1 |
|
|
T111 |
90 |
|
T112 |
685 |
|
T55 |
1004 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63683 |
1 |
|
|
T111 |
353 |
|
T112 |
1455 |
|
T55 |
2341 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42018 |
1 |
|
|
T111 |
88 |
|
T112 |
464 |
|
T55 |
710 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1719 |
1 |
|
|
T111 |
6 |
|
T112 |
24 |
|
T55 |
42 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1699 |
1 |
|
|
T111 |
7 |
|
T112 |
26 |
|
T55 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
21 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1690 |
1 |
|
|
T111 |
6 |
|
T112 |
24 |
|
T55 |
42 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1655 |
1 |
|
|
T111 |
7 |
|
T112 |
26 |
|
T55 |
39 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T111 |
6 |
|
T112 |
23 |
|
T55 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T111 |
6 |
|
T112 |
26 |
|
T55 |
39 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1639 |
1 |
|
|
T111 |
6 |
|
T112 |
23 |
|
T55 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T111 |
6 |
|
T112 |
25 |
|
T55 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T111 |
4 |
|
T112 |
23 |
|
T55 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T111 |
6 |
|
T112 |
24 |
|
T55 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T111 |
4 |
|
T112 |
23 |
|
T55 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T111 |
6 |
|
T112 |
23 |
|
T55 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T111 |
4 |
|
T112 |
23 |
|
T55 |
38 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T111 |
6 |
|
T112 |
23 |
|
T55 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T111 |
4 |
|
T112 |
22 |
|
T55 |
38 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T111 |
6 |
|
T112 |
22 |
|
T55 |
35 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T111 |
4 |
|
T112 |
21 |
|
T55 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T111 |
6 |
|
T112 |
20 |
|
T55 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T111 |
4 |
|
T112 |
21 |
|
T55 |
36 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T111 |
5 |
|
T112 |
20 |
|
T55 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T111 |
4 |
|
T112 |
21 |
|
T55 |
36 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T111 |
5 |
|
T112 |
19 |
|
T55 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T111 |
4 |
|
T112 |
21 |
|
T55 |
36 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T111 |
5 |
|
T112 |
19 |
|
T55 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T111 |
4 |
|
T112 |
21 |
|
T55 |
36 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T111 |
5 |
|
T112 |
19 |
|
T55 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T111 |
4 |
|
T112 |
21 |
|
T55 |
33 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T111 |
4 |
|
T112 |
19 |
|
T55 |
31 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T111 |
4 |
|
T112 |
21 |
|
T55 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
22 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T111 |
4 |
|
T112 |
17 |
|
T55 |
30 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
49166 |
1 |
|
|
T111 |
396 |
|
T112 |
983 |
|
T55 |
876 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50265 |
1 |
|
|
T111 |
68 |
|
T112 |
505 |
|
T55 |
2047 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58659 |
1 |
|
|
T111 |
1221 |
|
T112 |
1527 |
|
T55 |
1125 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48677 |
1 |
|
|
T111 |
128 |
|
T112 |
496 |
|
T55 |
1146 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T111 |
3 |
|
T112 |
28 |
|
T55 |
47 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T111 |
3 |
|
T112 |
26 |
|
T55 |
44 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1670 |
1 |
|
|
T111 |
3 |
|
T112 |
28 |
|
T55 |
44 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T111 |
3 |
|
T112 |
25 |
|
T55 |
44 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1644 |
1 |
|
|
T111 |
3 |
|
T112 |
28 |
|
T55 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T111 |
3 |
|
T112 |
25 |
|
T55 |
43 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T111 |
3 |
|
T112 |
28 |
|
T55 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T111 |
3 |
|
T112 |
24 |
|
T55 |
43 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T111 |
3 |
|
T112 |
28 |
|
T55 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T111 |
3 |
|
T112 |
24 |
|
T55 |
43 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T111 |
3 |
|
T112 |
27 |
|
T55 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T111 |
3 |
|
T112 |
23 |
|
T55 |
43 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T111 |
3 |
|
T112 |
27 |
|
T55 |
39 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T111 |
3 |
|
T112 |
23 |
|
T55 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T111 |
3 |
|
T112 |
27 |
|
T55 |
39 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T111 |
3 |
|
T112 |
23 |
|
T55 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T111 |
3 |
|
T112 |
26 |
|
T55 |
39 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T111 |
3 |
|
T112 |
21 |
|
T55 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T111 |
3 |
|
T112 |
25 |
|
T55 |
37 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T111 |
3 |
|
T112 |
21 |
|
T55 |
39 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T111 |
3 |
|
T112 |
23 |
|
T55 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T111 |
3 |
|
T112 |
18 |
|
T55 |
39 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T111 |
3 |
|
T112 |
22 |
|
T55 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T111 |
3 |
|
T112 |
16 |
|
T55 |
39 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T111 |
3 |
|
T112 |
22 |
|
T55 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T111 |
3 |
|
T112 |
16 |
|
T55 |
39 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T111 |
3 |
|
T112 |
22 |
|
T55 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T111 |
3 |
|
T112 |
16 |
|
T55 |
37 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1222 |
1 |
|
|
T111 |
3 |
|
T112 |
22 |
|
T55 |
32 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T111 |
3 |
|
T112 |
16 |
|
T55 |
37 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57438 |
1 |
|
|
T111 |
191 |
|
T112 |
980 |
|
T55 |
1139 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42110 |
1 |
|
|
T111 |
162 |
|
T112 |
276 |
|
T55 |
808 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62073 |
1 |
|
|
T111 |
279 |
|
T112 |
1823 |
|
T55 |
2832 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47000 |
1 |
|
|
T111 |
1006 |
|
T112 |
581 |
|
T55 |
596 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T111 |
4 |
|
T112 |
14 |
|
T55 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T111 |
11 |
|
T112 |
21 |
|
T55 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T111 |
5 |
|
T112 |
16 |
|
T55 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1657 |
1 |
|
|
T111 |
10 |
|
T112 |
20 |
|
T55 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T111 |
4 |
|
T112 |
14 |
|
T55 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T111 |
11 |
|
T112 |
20 |
|
T55 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T111 |
5 |
|
T112 |
16 |
|
T55 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T111 |
10 |
|
T112 |
20 |
|
T55 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T111 |
4 |
|
T112 |
14 |
|
T55 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T111 |
11 |
|
T112 |
18 |
|
T55 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T111 |
5 |
|
T112 |
16 |
|
T55 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T111 |
10 |
|
T112 |
20 |
|
T55 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T111 |
4 |
|
T112 |
14 |
|
T55 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T111 |
11 |
|
T112 |
18 |
|
T55 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T111 |
5 |
|
T112 |
16 |
|
T55 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1578 |
1 |
|
|
T111 |
10 |
|
T112 |
20 |
|
T55 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T111 |
4 |
|
T112 |
14 |
|
T55 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T111 |
9 |
|
T112 |
17 |
|
T55 |
29 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T111 |
5 |
|
T112 |
16 |
|
T55 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T111 |
10 |
|
T112 |
20 |
|
T55 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T111 |
4 |
|
T112 |
14 |
|
T55 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T111 |
9 |
|
T112 |
15 |
|
T55 |
29 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T111 |
5 |
|
T112 |
16 |
|
T55 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T111 |
10 |
|
T112 |
20 |
|
T55 |
30 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T111 |
9 |
|
T112 |
15 |
|
T55 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T111 |
10 |
|
T112 |
21 |
|
T55 |
29 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T111 |
9 |
|
T112 |
15 |
|
T55 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T111 |
10 |
|
T112 |
20 |
|
T55 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T111 |
9 |
|
T112 |
14 |
|
T55 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T111 |
10 |
|
T112 |
19 |
|
T55 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T111 |
9 |
|
T112 |
14 |
|
T55 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T111 |
10 |
|
T112 |
18 |
|
T55 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T111 |
9 |
|
T112 |
13 |
|
T55 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T111 |
9 |
|
T112 |
17 |
|
T55 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T111 |
9 |
|
T112 |
12 |
|
T55 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T111 |
8 |
|
T112 |
17 |
|
T55 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T111 |
9 |
|
T112 |
11 |
|
T55 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T111 |
7 |
|
T112 |
17 |
|
T55 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1172 |
1 |
|
|
T111 |
9 |
|
T112 |
11 |
|
T55 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T111 |
7 |
|
T112 |
16 |
|
T55 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1139 |
1 |
|
|
T111 |
9 |
|
T112 |
11 |
|
T55 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T111 |
6 |
|
T112 |
16 |
|
T55 |
25 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55373 |
1 |
|
|
T111 |
337 |
|
T112 |
900 |
|
T55 |
1191 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46275 |
1 |
|
|
T111 |
207 |
|
T112 |
1244 |
|
T55 |
2209 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63900 |
1 |
|
|
T111 |
212 |
|
T112 |
721 |
|
T55 |
1196 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42799 |
1 |
|
|
T111 |
932 |
|
T112 |
615 |
|
T55 |
696 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T111 |
6 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T111 |
8 |
|
T112 |
31 |
|
T55 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T111 |
7 |
|
T112 |
28 |
|
T55 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T111 |
6 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T111 |
8 |
|
T112 |
30 |
|
T55 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T111 |
5 |
|
T112 |
28 |
|
T55 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T111 |
6 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T111 |
8 |
|
T112 |
30 |
|
T55 |
37 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T111 |
5 |
|
T112 |
28 |
|
T55 |
37 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T111 |
6 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T111 |
7 |
|
T112 |
29 |
|
T55 |
37 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T111 |
5 |
|
T112 |
26 |
|
T55 |
37 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T111 |
6 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T111 |
7 |
|
T112 |
29 |
|
T55 |
36 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T111 |
4 |
|
T112 |
25 |
|
T55 |
37 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T111 |
6 |
|
T112 |
11 |
|
T55 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T111 |
7 |
|
T112 |
29 |
|
T55 |
36 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T111 |
4 |
|
T112 |
25 |
|
T55 |
36 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T111 |
7 |
|
T112 |
29 |
|
T55 |
36 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T111 |
4 |
|
T112 |
25 |
|
T55 |
34 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T111 |
7 |
|
T112 |
28 |
|
T55 |
36 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T111 |
4 |
|
T112 |
24 |
|
T55 |
33 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T111 |
7 |
|
T112 |
27 |
|
T55 |
34 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T111 |
4 |
|
T112 |
23 |
|
T55 |
31 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T111 |
7 |
|
T112 |
25 |
|
T55 |
34 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T111 |
7 |
|
T112 |
14 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T111 |
4 |
|
T112 |
22 |
|
T55 |
31 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T111 |
7 |
|
T112 |
23 |
|
T55 |
33 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T111 |
7 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T111 |
4 |
|
T112 |
22 |
|
T55 |
31 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T111 |
6 |
|
T112 |
22 |
|
T55 |
33 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T111 |
7 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T111 |
4 |
|
T112 |
22 |
|
T55 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T111 |
6 |
|
T112 |
21 |
|
T55 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T111 |
7 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T111 |
4 |
|
T112 |
22 |
|
T55 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T111 |
6 |
|
T112 |
20 |
|
T55 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T111 |
7 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1176 |
1 |
|
|
T111 |
4 |
|
T112 |
22 |
|
T55 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T111 |
6 |
|
T112 |
20 |
|
T55 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T111 |
7 |
|
T112 |
13 |
|
T55 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1155 |
1 |
|
|
T111 |
4 |
|
T112 |
22 |
|
T55 |
27 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62005 |
1 |
|
|
T111 |
1218 |
|
T112 |
862 |
|
T55 |
1224 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49264 |
1 |
|
|
T111 |
93 |
|
T112 |
1298 |
|
T55 |
862 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54908 |
1 |
|
|
T111 |
237 |
|
T112 |
592 |
|
T55 |
989 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41074 |
1 |
|
|
T111 |
170 |
|
T112 |
800 |
|
T55 |
2127 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T111 |
6 |
|
T112 |
10 |
|
T55 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T111 |
6 |
|
T112 |
31 |
|
T55 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T111 |
4 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1671 |
1 |
|
|
T111 |
7 |
|
T112 |
33 |
|
T55 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T111 |
6 |
|
T112 |
10 |
|
T55 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T111 |
6 |
|
T112 |
31 |
|
T55 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T111 |
4 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T111 |
7 |
|
T112 |
33 |
|
T55 |
46 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T111 |
6 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T111 |
5 |
|
T112 |
28 |
|
T55 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T111 |
4 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1618 |
1 |
|
|
T111 |
7 |
|
T112 |
33 |
|
T55 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T111 |
6 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T111 |
5 |
|
T112 |
27 |
|
T55 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T111 |
4 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T111 |
7 |
|
T112 |
32 |
|
T55 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T111 |
6 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T111 |
5 |
|
T112 |
26 |
|
T55 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T111 |
4 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T111 |
7 |
|
T112 |
31 |
|
T55 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T111 |
6 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T111 |
5 |
|
T112 |
26 |
|
T55 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T111 |
4 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T111 |
7 |
|
T112 |
29 |
|
T55 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T111 |
6 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T111 |
5 |
|
T112 |
24 |
|
T55 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T111 |
4 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T111 |
7 |
|
T112 |
27 |
|
T55 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T111 |
6 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T111 |
5 |
|
T112 |
22 |
|
T55 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T111 |
4 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T111 |
7 |
|
T112 |
27 |
|
T55 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T111 |
6 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T111 |
5 |
|
T112 |
21 |
|
T55 |
35 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T111 |
4 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T111 |
7 |
|
T112 |
27 |
|
T55 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T111 |
6 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T111 |
5 |
|
T112 |
21 |
|
T55 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T111 |
4 |
|
T112 |
8 |
|
T55 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T111 |
7 |
|
T112 |
27 |
|
T55 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T111 |
6 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T111 |
5 |
|
T112 |
21 |
|
T55 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T111 |
4 |
|
T112 |
7 |
|
T55 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T111 |
7 |
|
T112 |
27 |
|
T55 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T111 |
6 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T111 |
4 |
|
T112 |
21 |
|
T55 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T111 |
4 |
|
T112 |
7 |
|
T55 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T111 |
7 |
|
T112 |
27 |
|
T55 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T111 |
6 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T111 |
4 |
|
T112 |
20 |
|
T55 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T111 |
4 |
|
T112 |
7 |
|
T55 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T111 |
7 |
|
T112 |
27 |
|
T55 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T111 |
6 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T111 |
3 |
|
T112 |
20 |
|
T55 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T111 |
4 |
|
T112 |
7 |
|
T55 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T111 |
7 |
|
T112 |
26 |
|
T55 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T111 |
6 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T111 |
3 |
|
T112 |
19 |
|
T55 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T111 |
4 |
|
T112 |
7 |
|
T55 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T111 |
7 |
|
T112 |
26 |
|
T55 |
34 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54241 |
1 |
|
|
T111 |
189 |
|
T112 |
571 |
|
T55 |
1229 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51972 |
1 |
|
|
T111 |
142 |
|
T112 |
890 |
|
T55 |
684 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60312 |
1 |
|
|
T111 |
1224 |
|
T112 |
595 |
|
T55 |
1395 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41216 |
1 |
|
|
T111 |
148 |
|
T112 |
1350 |
|
T55 |
1863 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T111 |
3 |
|
T112 |
6 |
|
T55 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1680 |
1 |
|
|
T111 |
10 |
|
T112 |
37 |
|
T55 |
43 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T111 |
10 |
|
T112 |
36 |
|
T55 |
40 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T111 |
3 |
|
T112 |
6 |
|
T55 |
20 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1653 |
1 |
|
|
T111 |
10 |
|
T112 |
36 |
|
T55 |
41 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T111 |
10 |
|
T112 |
35 |
|
T55 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T111 |
3 |
|
T112 |
6 |
|
T55 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T111 |
10 |
|
T112 |
36 |
|
T55 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T111 |
10 |
|
T112 |
35 |
|
T55 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T111 |
3 |
|
T112 |
6 |
|
T55 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T111 |
10 |
|
T112 |
35 |
|
T55 |
41 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T111 |
8 |
|
T112 |
35 |
|
T55 |
38 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T111 |
3 |
|
T112 |
6 |
|
T55 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T111 |
9 |
|
T112 |
35 |
|
T55 |
40 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T111 |
8 |
|
T112 |
35 |
|
T55 |
36 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T111 |
3 |
|
T112 |
6 |
|
T55 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T111 |
9 |
|
T112 |
34 |
|
T55 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T111 |
8 |
|
T112 |
34 |
|
T55 |
35 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T111 |
3 |
|
T112 |
6 |
|
T55 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T111 |
9 |
|
T112 |
34 |
|
T55 |
37 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T111 |
8 |
|
T112 |
33 |
|
T55 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T111 |
3 |
|
T112 |
6 |
|
T55 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T111 |
9 |
|
T112 |
34 |
|
T55 |
37 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T111 |
8 |
|
T112 |
33 |
|
T55 |
31 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T111 |
3 |
|
T112 |
6 |
|
T55 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T111 |
8 |
|
T112 |
34 |
|
T55 |
36 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T111 |
8 |
|
T112 |
32 |
|
T55 |
31 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T111 |
3 |
|
T112 |
6 |
|
T55 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T111 |
8 |
|
T112 |
34 |
|
T55 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T111 |
8 |
|
T112 |
31 |
|
T55 |
31 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T111 |
3 |
|
T112 |
6 |
|
T55 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T111 |
8 |
|
T112 |
34 |
|
T55 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T111 |
8 |
|
T112 |
29 |
|
T55 |
31 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T111 |
3 |
|
T112 |
6 |
|
T55 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T111 |
8 |
|
T112 |
34 |
|
T55 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T111 |
7 |
|
T112 |
28 |
|
T55 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T111 |
3 |
|
T112 |
6 |
|
T55 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T111 |
8 |
|
T112 |
33 |
|
T55 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1222 |
1 |
|
|
T111 |
7 |
|
T112 |
28 |
|
T55 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T111 |
3 |
|
T112 |
6 |
|
T55 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T111 |
8 |
|
T112 |
33 |
|
T55 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1182 |
1 |
|
|
T111 |
6 |
|
T112 |
26 |
|
T55 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T111 |
3 |
|
T112 |
6 |
|
T55 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1245 |
1 |
|
|
T111 |
7 |
|
T112 |
32 |
|
T55 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1142 |
1 |
|
|
T111 |
6 |
|
T112 |
26 |
|
T55 |
27 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56689 |
1 |
|
|
T111 |
123 |
|
T112 |
1657 |
|
T55 |
2603 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50029 |
1 |
|
|
T111 |
273 |
|
T112 |
569 |
|
T55 |
610 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56360 |
1 |
|
|
T111 |
1256 |
|
T112 |
625 |
|
T55 |
1631 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44484 |
1 |
|
|
T111 |
82 |
|
T112 |
607 |
|
T55 |
684 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1640 |
1 |
|
|
T111 |
8 |
|
T112 |
32 |
|
T55 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1645 |
1 |
|
|
T111 |
7 |
|
T112 |
32 |
|
T55 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T111 |
8 |
|
T112 |
32 |
|
T55 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T111 |
6 |
|
T112 |
32 |
|
T55 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T111 |
7 |
|
T112 |
32 |
|
T55 |
26 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T111 |
6 |
|
T112 |
29 |
|
T55 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T111 |
7 |
|
T112 |
31 |
|
T55 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T111 |
6 |
|
T112 |
29 |
|
T55 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T111 |
7 |
|
T112 |
31 |
|
T55 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T111 |
5 |
|
T112 |
29 |
|
T55 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T111 |
7 |
|
T112 |
31 |
|
T55 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T111 |
5 |
|
T112 |
28 |
|
T55 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T111 |
3 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T111 |
7 |
|
T112 |
30 |
|
T55 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T111 |
5 |
|
T112 |
29 |
|
T55 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T111 |
3 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T111 |
7 |
|
T112 |
27 |
|
T55 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T111 |
5 |
|
T112 |
29 |
|
T55 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T111 |
3 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T111 |
7 |
|
T112 |
26 |
|
T55 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T111 |
5 |
|
T112 |
29 |
|
T55 |
26 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T111 |
3 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T111 |
7 |
|
T112 |
26 |
|
T55 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T111 |
5 |
|
T112 |
27 |
|
T55 |
26 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T111 |
3 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T111 |
7 |
|
T112 |
25 |
|
T55 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T111 |
5 |
|
T112 |
27 |
|
T55 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T111 |
3 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T111 |
7 |
|
T112 |
24 |
|
T55 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T111 |
5 |
|
T112 |
24 |
|
T55 |
25 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T111 |
3 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T111 |
7 |
|
T112 |
23 |
|
T55 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T111 |
4 |
|
T112 |
24 |
|
T55 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T111 |
3 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T111 |
7 |
|
T112 |
21 |
|
T55 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T111 |
4 |
|
T112 |
24 |
|
T55 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T111 |
3 |
|
T112 |
11 |
|
T55 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1202 |
1 |
|
|
T111 |
7 |
|
T112 |
21 |
|
T55 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T111 |
5 |
|
T112 |
10 |
|
T55 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T111 |
4 |
|
T112 |
24 |
|
T55 |
21 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63564 |
1 |
|
|
T111 |
1058 |
|
T112 |
1543 |
|
T55 |
914 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45465 |
1 |
|
|
T111 |
101 |
|
T112 |
509 |
|
T55 |
1015 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58330 |
1 |
|
|
T111 |
408 |
|
T112 |
858 |
|
T55 |
2335 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41460 |
1 |
|
|
T111 |
144 |
|
T112 |
653 |
|
T55 |
846 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T111 |
6 |
|
T112 |
15 |
|
T55 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T111 |
6 |
|
T112 |
23 |
|
T55 |
50 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T111 |
6 |
|
T112 |
26 |
|
T55 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T111 |
6 |
|
T112 |
15 |
|
T55 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T111 |
6 |
|
T112 |
22 |
|
T55 |
50 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T111 |
6 |
|
T112 |
26 |
|
T55 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T111 |
6 |
|
T112 |
15 |
|
T55 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T111 |
6 |
|
T112 |
21 |
|
T55 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T111 |
6 |
|
T112 |
26 |
|
T55 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T111 |
6 |
|
T112 |
15 |
|
T55 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T111 |
6 |
|
T112 |
20 |
|
T55 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T111 |
6 |
|
T112 |
26 |
|
T55 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T111 |
6 |
|
T112 |
15 |
|
T55 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T111 |
6 |
|
T112 |
20 |
|
T55 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T111 |
6 |
|
T112 |
25 |
|
T55 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T111 |
6 |
|
T112 |
15 |
|
T55 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T111 |
6 |
|
T112 |
19 |
|
T55 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T111 |
5 |
|
T112 |
12 |
|
T55 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T111 |
6 |
|
T112 |
24 |
|
T55 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T111 |
6 |
|
T112 |
19 |
|
T55 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T111 |
6 |
|
T112 |
24 |
|
T55 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T111 |
6 |
|
T112 |
19 |
|
T55 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T111 |
6 |
|
T112 |
24 |
|
T55 |
41 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T111 |
6 |
|
T112 |
19 |
|
T55 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T111 |
6 |
|
T112 |
24 |
|
T55 |
41 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T111 |
6 |
|
T112 |
19 |
|
T55 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T111 |
6 |
|
T112 |
24 |
|
T55 |
39 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T111 |
6 |
|
T112 |
19 |
|
T55 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T111 |
6 |
|
T112 |
24 |
|
T55 |
39 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T111 |
6 |
|
T112 |
16 |
|
T55 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T111 |
6 |
|
T112 |
24 |
|
T55 |
38 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T111 |
6 |
|
T112 |
16 |
|
T55 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T111 |
6 |
|
T112 |
23 |
|
T55 |
38 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T111 |
6 |
|
T112 |
23 |
|
T55 |
36 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T111 |
4 |
|
T112 |
15 |
|
T55 |
41 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1157 |
1 |
|
|
T111 |
6 |
|
T112 |
23 |
|
T55 |
35 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57357 |
1 |
|
|
T111 |
89 |
|
T112 |
1081 |
|
T55 |
1352 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45188 |
1 |
|
|
T111 |
397 |
|
T112 |
417 |
|
T55 |
1906 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52916 |
1 |
|
|
T111 |
159 |
|
T112 |
1743 |
|
T55 |
1253 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51191 |
1 |
|
|
T111 |
1022 |
|
T112 |
360 |
|
T55 |
715 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T111 |
12 |
|
T112 |
20 |
|
T55 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1680 |
1 |
|
|
T111 |
11 |
|
T112 |
21 |
|
T55 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T111 |
12 |
|
T112 |
20 |
|
T55 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1645 |
1 |
|
|
T111 |
10 |
|
T112 |
21 |
|
T55 |
36 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T111 |
12 |
|
T112 |
20 |
|
T55 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T111 |
10 |
|
T112 |
21 |
|
T55 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T111 |
12 |
|
T112 |
20 |
|
T55 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T111 |
10 |
|
T112 |
21 |
|
T55 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T111 |
12 |
|
T112 |
19 |
|
T55 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T111 |
10 |
|
T112 |
21 |
|
T55 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T111 |
11 |
|
T112 |
19 |
|
T55 |
32 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T111 |
9 |
|
T112 |
21 |
|
T55 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T111 |
11 |
|
T112 |
18 |
|
T55 |
32 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T111 |
9 |
|
T112 |
20 |
|
T55 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T111 |
11 |
|
T112 |
17 |
|
T55 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T111 |
9 |
|
T112 |
19 |
|
T55 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T111 |
11 |
|
T112 |
16 |
|
T55 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T111 |
9 |
|
T112 |
19 |
|
T55 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T111 |
11 |
|
T112 |
16 |
|
T55 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T111 |
9 |
|
T112 |
19 |
|
T55 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T111 |
10 |
|
T112 |
16 |
|
T55 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T111 |
9 |
|
T112 |
19 |
|
T55 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T111 |
10 |
|
T112 |
16 |
|
T55 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T111 |
8 |
|
T112 |
18 |
|
T55 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T111 |
10 |
|
T112 |
16 |
|
T55 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T111 |
8 |
|
T112 |
17 |
|
T55 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T111 |
10 |
|
T112 |
16 |
|
T55 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T111 |
8 |
|
T112 |
17 |
|
T55 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1198 |
1 |
|
|
T111 |
10 |
|
T112 |
16 |
|
T55 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T111 |
3 |
|
T112 |
15 |
|
T55 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T111 |
8 |
|
T112 |
17 |
|
T55 |
23 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60581 |
1 |
|
|
T111 |
317 |
|
T112 |
714 |
|
T55 |
866 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44769 |
1 |
|
|
T111 |
143 |
|
T112 |
1316 |
|
T55 |
988 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55335 |
1 |
|
|
T111 |
1141 |
|
T112 |
804 |
|
T55 |
2353 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47109 |
1 |
|
|
T111 |
111 |
|
T112 |
714 |
|
T55 |
913 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T111 |
8 |
|
T112 |
29 |
|
T55 |
50 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T111 |
9 |
|
T112 |
28 |
|
T55 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T111 |
8 |
|
T112 |
27 |
|
T55 |
49 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T111 |
9 |
|
T112 |
27 |
|
T55 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1576 |
1 |
|
|
T111 |
8 |
|
T112 |
25 |
|
T55 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T111 |
8 |
|
T112 |
27 |
|
T55 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T111 |
8 |
|
T112 |
25 |
|
T55 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T111 |
7 |
|
T112 |
26 |
|
T55 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T111 |
8 |
|
T112 |
25 |
|
T55 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T111 |
6 |
|
T112 |
25 |
|
T55 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T111 |
5 |
|
T112 |
11 |
|
T55 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T111 |
8 |
|
T112 |
25 |
|
T55 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T111 |
6 |
|
T112 |
25 |
|
T55 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T111 |
8 |
|
T112 |
24 |
|
T55 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T111 |
6 |
|
T112 |
24 |
|
T55 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T111 |
7 |
|
T112 |
24 |
|
T55 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T111 |
6 |
|
T112 |
24 |
|
T55 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T111 |
7 |
|
T112 |
24 |
|
T55 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T111 |
6 |
|
T112 |
23 |
|
T55 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T111 |
7 |
|
T112 |
23 |
|
T55 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T111 |
6 |
|
T112 |
21 |
|
T55 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T111 |
6 |
|
T112 |
23 |
|
T55 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T111 |
6 |
|
T112 |
21 |
|
T55 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T111 |
6 |
|
T112 |
22 |
|
T55 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T111 |
6 |
|
T112 |
21 |
|
T55 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T111 |
6 |
|
T112 |
22 |
|
T55 |
34 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T111 |
6 |
|
T112 |
20 |
|
T55 |
38 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T111 |
6 |
|
T112 |
22 |
|
T55 |
34 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T111 |
6 |
|
T112 |
20 |
|
T55 |
38 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T111 |
6 |
|
T112 |
22 |
|
T55 |
34 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1185 |
1 |
|
|
T111 |
6 |
|
T112 |
20 |
|
T55 |
35 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57323 |
1 |
|
|
T111 |
136 |
|
T112 |
813 |
|
T55 |
1001 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46096 |
1 |
|
|
T111 |
1005 |
|
T112 |
499 |
|
T55 |
980 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53792 |
1 |
|
|
T111 |
177 |
|
T112 |
766 |
|
T55 |
1087 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50590 |
1 |
|
|
T111 |
312 |
|
T112 |
1396 |
|
T55 |
2212 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T111 |
13 |
|
T112 |
28 |
|
T55 |
41 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T111 |
3 |
|
T112 |
11 |
|
T55 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1661 |
1 |
|
|
T111 |
12 |
|
T112 |
32 |
|
T55 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T111 |
13 |
|
T112 |
28 |
|
T55 |
40 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T111 |
3 |
|
T112 |
11 |
|
T55 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T111 |
12 |
|
T112 |
31 |
|
T55 |
43 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T111 |
13 |
|
T112 |
28 |
|
T55 |
39 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T111 |
3 |
|
T112 |
11 |
|
T55 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T111 |
12 |
|
T112 |
30 |
|
T55 |
43 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T111 |
13 |
|
T112 |
23 |
|
T55 |
39 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T111 |
3 |
|
T112 |
11 |
|
T55 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T111 |
11 |
|
T112 |
30 |
|
T55 |
41 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T111 |
13 |
|
T112 |
23 |
|
T55 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T111 |
3 |
|
T112 |
11 |
|
T55 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T111 |
11 |
|
T112 |
30 |
|
T55 |
40 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T111 |
3 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T111 |
12 |
|
T112 |
23 |
|
T55 |
35 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T111 |
3 |
|
T112 |
11 |
|
T55 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T111 |
10 |
|
T112 |
29 |
|
T55 |
39 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T111 |
2 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T111 |
12 |
|
T112 |
23 |
|
T55 |
33 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T111 |
3 |
|
T112 |
10 |
|
T55 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T111 |
10 |
|
T112 |
30 |
|
T55 |
39 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T111 |
2 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T111 |
12 |
|
T112 |
23 |
|
T55 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T111 |
3 |
|
T112 |
10 |
|
T55 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T111 |
10 |
|
T112 |
29 |
|
T55 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T111 |
2 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T111 |
12 |
|
T112 |
22 |
|
T55 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T111 |
3 |
|
T112 |
10 |
|
T55 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T111 |
10 |
|
T112 |
28 |
|
T55 |
37 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T111 |
2 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T111 |
12 |
|
T112 |
21 |
|
T55 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T111 |
3 |
|
T112 |
10 |
|
T55 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T111 |
10 |
|
T112 |
28 |
|
T55 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T111 |
2 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T111 |
11 |
|
T112 |
20 |
|
T55 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T111 |
3 |
|
T112 |
10 |
|
T55 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T111 |
10 |
|
T112 |
26 |
|
T55 |
35 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T111 |
2 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T111 |
10 |
|
T112 |
20 |
|
T55 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T111 |
3 |
|
T112 |
10 |
|
T55 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T111 |
10 |
|
T112 |
26 |
|
T55 |
34 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T111 |
2 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T111 |
10 |
|
T112 |
20 |
|
T55 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T111 |
3 |
|
T112 |
10 |
|
T55 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T111 |
10 |
|
T112 |
26 |
|
T55 |
33 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T111 |
2 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T111 |
10 |
|
T112 |
19 |
|
T55 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T111 |
3 |
|
T112 |
10 |
|
T55 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T111 |
10 |
|
T112 |
26 |
|
T55 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T111 |
2 |
|
T112 |
14 |
|
T55 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T111 |
9 |
|
T112 |
19 |
|
T55 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T111 |
3 |
|
T112 |
10 |
|
T55 |
15 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1196 |
1 |
|
|
T111 |
10 |
|
T112 |
26 |
|
T55 |
32 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63692 |
1 |
|
|
T111 |
213 |
|
T112 |
783 |
|
T55 |
2656 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47357 |
1 |
|
|
T111 |
1155 |
|
T112 |
492 |
|
T55 |
644 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58160 |
1 |
|
|
T111 |
73 |
|
T112 |
837 |
|
T55 |
1256 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
38931 |
1 |
|
|
T111 |
224 |
|
T112 |
1412 |
|
T55 |
830 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T111 |
14 |
|
T112 |
23 |
|
T55 |
28 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T111 |
1 |
|
T112 |
17 |
|
T55 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T111 |
14 |
|
T112 |
22 |
|
T55 |
33 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T111 |
13 |
|
T112 |
22 |
|
T55 |
28 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T111 |
1 |
|
T112 |
17 |
|
T55 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T111 |
13 |
|
T112 |
22 |
|
T55 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T111 |
13 |
|
T112 |
22 |
|
T55 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T111 |
1 |
|
T112 |
17 |
|
T55 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T111 |
11 |
|
T112 |
22 |
|
T55 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T111 |
13 |
|
T112 |
22 |
|
T55 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T111 |
1 |
|
T112 |
17 |
|
T55 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T111 |
10 |
|
T112 |
21 |
|
T55 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T111 |
13 |
|
T112 |
20 |
|
T55 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T111 |
1 |
|
T112 |
17 |
|
T55 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T111 |
10 |
|
T112 |
21 |
|
T55 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T111 |
13 |
|
T112 |
20 |
|
T55 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T111 |
1 |
|
T112 |
17 |
|
T55 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T111 |
10 |
|
T112 |
21 |
|
T55 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T111 |
13 |
|
T112 |
20 |
|
T55 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T111 |
1 |
|
T112 |
17 |
|
T55 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T111 |
10 |
|
T112 |
21 |
|
T55 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T111 |
13 |
|
T112 |
20 |
|
T55 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T111 |
1 |
|
T112 |
17 |
|
T55 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T111 |
9 |
|
T112 |
21 |
|
T55 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T111 |
13 |
|
T112 |
20 |
|
T55 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T111 |
1 |
|
T112 |
17 |
|
T55 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T111 |
8 |
|
T112 |
20 |
|
T55 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T111 |
13 |
|
T112 |
19 |
|
T55 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T111 |
1 |
|
T112 |
17 |
|
T55 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T111 |
8 |
|
T112 |
19 |
|
T55 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T111 |
13 |
|
T112 |
19 |
|
T55 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T111 |
1 |
|
T112 |
17 |
|
T55 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T111 |
7 |
|
T112 |
19 |
|
T55 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T111 |
13 |
|
T112 |
18 |
|
T55 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T111 |
1 |
|
T112 |
17 |
|
T55 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T111 |
7 |
|
T112 |
19 |
|
T55 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1222 |
1 |
|
|
T111 |
13 |
|
T112 |
18 |
|
T55 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T111 |
1 |
|
T112 |
17 |
|
T55 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T111 |
7 |
|
T112 |
19 |
|
T55 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T111 |
13 |
|
T112 |
18 |
|
T55 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T111 |
1 |
|
T112 |
17 |
|
T55 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1165 |
1 |
|
|
T111 |
7 |
|
T112 |
19 |
|
T55 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T111 |
2 |
|
T112 |
15 |
|
T55 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1160 |
1 |
|
|
T111 |
13 |
|
T112 |
17 |
|
T55 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T111 |
1 |
|
T112 |
17 |
|
T55 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1140 |
1 |
|
|
T111 |
7 |
|
T112 |
19 |
|
T55 |
28 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62189 |
1 |
|
|
T111 |
1041 |
|
T112 |
497 |
|
T55 |
2227 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48154 |
1 |
|
|
T111 |
272 |
|
T112 |
739 |
|
T55 |
832 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55813 |
1 |
|
|
T111 |
231 |
|
T112 |
1542 |
|
T55 |
1226 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42151 |
1 |
|
|
T111 |
125 |
|
T112 |
753 |
|
T55 |
816 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T111 |
12 |
|
T112 |
32 |
|
T55 |
47 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
4 |
|
T112 |
8 |
|
T55 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T111 |
10 |
|
T112 |
33 |
|
T55 |
46 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T111 |
12 |
|
T112 |
32 |
|
T55 |
46 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
4 |
|
T112 |
8 |
|
T55 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T111 |
9 |
|
T112 |
33 |
|
T55 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T111 |
12 |
|
T112 |
31 |
|
T55 |
47 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
4 |
|
T112 |
8 |
|
T55 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T111 |
8 |
|
T112 |
32 |
|
T55 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T111 |
12 |
|
T112 |
31 |
|
T55 |
45 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
4 |
|
T112 |
8 |
|
T55 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T111 |
8 |
|
T112 |
31 |
|
T55 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T111 |
12 |
|
T112 |
30 |
|
T55 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
4 |
|
T112 |
8 |
|
T55 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T111 |
8 |
|
T112 |
31 |
|
T55 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T111 |
12 |
|
T112 |
29 |
|
T55 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T111 |
4 |
|
T112 |
8 |
|
T55 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T111 |
7 |
|
T112 |
29 |
|
T55 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T111 |
12 |
|
T112 |
26 |
|
T55 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T111 |
4 |
|
T112 |
7 |
|
T55 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T111 |
7 |
|
T112 |
29 |
|
T55 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T111 |
11 |
|
T112 |
26 |
|
T55 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T111 |
4 |
|
T112 |
7 |
|
T55 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T111 |
6 |
|
T112 |
28 |
|
T55 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T111 |
11 |
|
T112 |
26 |
|
T55 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T111 |
4 |
|
T112 |
7 |
|
T55 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T111 |
6 |
|
T112 |
28 |
|
T55 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T111 |
11 |
|
T112 |
26 |
|
T55 |
38 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T111 |
4 |
|
T112 |
7 |
|
T55 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T111 |
6 |
|
T112 |
28 |
|
T55 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T111 |
11 |
|
T112 |
26 |
|
T55 |
38 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T111 |
4 |
|
T112 |
7 |
|
T55 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T111 |
6 |
|
T112 |
26 |
|
T55 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T111 |
10 |
|
T112 |
26 |
|
T55 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T111 |
4 |
|
T112 |
7 |
|
T55 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T111 |
6 |
|
T112 |
26 |
|
T55 |
35 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T111 |
9 |
|
T112 |
26 |
|
T55 |
33 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T111 |
4 |
|
T112 |
7 |
|
T55 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T111 |
6 |
|
T112 |
26 |
|
T55 |
35 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T111 |
9 |
|
T112 |
25 |
|
T55 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T111 |
4 |
|
T112 |
7 |
|
T55 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T111 |
6 |
|
T112 |
26 |
|
T55 |
33 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T111 |
3 |
|
T112 |
8 |
|
T55 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T111 |
9 |
|
T112 |
25 |
|
T55 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T111 |
4 |
|
T112 |
7 |
|
T55 |
19 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1148 |
1 |
|
|
T111 |
6 |
|
T112 |
22 |
|
T55 |
33 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59230 |
1 |
|
|
T111 |
1024 |
|
T112 |
766 |
|
T55 |
1084 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43385 |
1 |
|
|
T111 |
192 |
|
T112 |
1343 |
|
T55 |
851 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56560 |
1 |
|
|
T111 |
323 |
|
T112 |
645 |
|
T55 |
1295 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48285 |
1 |
|
|
T111 |
144 |
|
T112 |
706 |
|
T55 |
2024 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1644 |
1 |
|
|
T111 |
11 |
|
T112 |
29 |
|
T55 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1655 |
1 |
|
|
T111 |
10 |
|
T112 |
30 |
|
T55 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T111 |
10 |
|
T112 |
29 |
|
T55 |
38 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1624 |
1 |
|
|
T111 |
10 |
|
T112 |
30 |
|
T55 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T111 |
9 |
|
T112 |
29 |
|
T55 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T111 |
10 |
|
T112 |
30 |
|
T55 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T111 |
8 |
|
T112 |
29 |
|
T55 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T111 |
10 |
|
T112 |
30 |
|
T55 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T111 |
8 |
|
T112 |
28 |
|
T55 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T111 |
10 |
|
T112 |
30 |
|
T55 |
38 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T111 |
8 |
|
T112 |
27 |
|
T55 |
38 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T111 |
4 |
|
T112 |
11 |
|
T55 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T111 |
9 |
|
T112 |
30 |
|
T55 |
38 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T111 |
8 |
|
T112 |
26 |
|
T55 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T111 |
4 |
|
T112 |
10 |
|
T55 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T111 |
8 |
|
T112 |
31 |
|
T55 |
38 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T111 |
8 |
|
T112 |
24 |
|
T55 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T111 |
4 |
|
T112 |
10 |
|
T55 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T111 |
7 |
|
T112 |
30 |
|
T55 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T111 |
8 |
|
T112 |
24 |
|
T55 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T111 |
4 |
|
T112 |
10 |
|
T55 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T111 |
7 |
|
T112 |
29 |
|
T55 |
34 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T111 |
8 |
|
T112 |
23 |
|
T55 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T111 |
4 |
|
T112 |
10 |
|
T55 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T111 |
7 |
|
T112 |
29 |
|
T55 |
34 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T111 |
7 |
|
T112 |
23 |
|
T55 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T111 |
4 |
|
T112 |
10 |
|
T55 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T111 |
7 |
|
T112 |
28 |
|
T55 |
34 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T111 |
7 |
|
T112 |
23 |
|
T55 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T111 |
4 |
|
T112 |
10 |
|
T55 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T111 |
7 |
|
T112 |
27 |
|
T55 |
32 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T111 |
6 |
|
T112 |
22 |
|
T55 |
36 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T111 |
4 |
|
T112 |
10 |
|
T55 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T111 |
7 |
|
T112 |
27 |
|
T55 |
32 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T111 |
6 |
|
T112 |
22 |
|
T55 |
34 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T111 |
4 |
|
T112 |
10 |
|
T55 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T111 |
7 |
|
T112 |
25 |
|
T55 |
32 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T111 |
4 |
|
T112 |
12 |
|
T55 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T111 |
6 |
|
T112 |
22 |
|
T55 |
33 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T111 |
4 |
|
T112 |
10 |
|
T55 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T111 |
7 |
|
T112 |
25 |
|
T55 |
32 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58674 |
1 |
|
|
T111 |
557 |
|
T112 |
775 |
|
T55 |
1304 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47961 |
1 |
|
|
T111 |
915 |
|
T112 |
638 |
|
T55 |
763 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56989 |
1 |
|
|
T111 |
196 |
|
T112 |
1431 |
|
T55 |
1302 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43906 |
1 |
|
|
T111 |
148 |
|
T112 |
687 |
|
T55 |
1915 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T111 |
3 |
|
T112 |
10 |
|
T55 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1695 |
1 |
|
|
T111 |
6 |
|
T112 |
30 |
|
T55 |
36 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1671 |
1 |
|
|
T111 |
3 |
|
T112 |
26 |
|
T55 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T111 |
3 |
|
T112 |
10 |
|
T55 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T111 |
6 |
|
T112 |
30 |
|
T55 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T111 |
3 |
|
T112 |
26 |
|
T55 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T111 |
3 |
|
T112 |
10 |
|
T55 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1635 |
1 |
|
|
T111 |
6 |
|
T112 |
29 |
|
T55 |
34 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T111 |
3 |
|
T112 |
26 |
|
T55 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T111 |
3 |
|
T112 |
10 |
|
T55 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T111 |
6 |
|
T112 |
26 |
|
T55 |
33 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T111 |
3 |
|
T112 |
26 |
|
T55 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T111 |
3 |
|
T112 |
10 |
|
T55 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T111 |
6 |
|
T112 |
25 |
|
T55 |
33 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T111 |
3 |
|
T112 |
26 |
|
T55 |
37 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T111 |
3 |
|
T112 |
10 |
|
T55 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T111 |
6 |
|
T112 |
25 |
|
T55 |
33 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T111 |
2 |
|
T112 |
26 |
|
T55 |
37 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T111 |
6 |
|
T112 |
22 |
|
T55 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T111 |
2 |
|
T112 |
25 |
|
T55 |
36 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T111 |
6 |
|
T112 |
22 |
|
T55 |
31 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T111 |
1 |
|
T112 |
25 |
|
T55 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T111 |
6 |
|
T112 |
22 |
|
T55 |
30 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T111 |
1 |
|
T112 |
24 |
|
T55 |
33 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T111 |
6 |
|
T112 |
21 |
|
T55 |
30 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T111 |
5 |
|
T112 |
15 |
|
T55 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T111 |
1 |
|
T112 |
24 |
|
T55 |
33 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T111 |
6 |
|
T112 |
21 |
|
T55 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T111 |
1 |
|
T112 |
21 |
|
T55 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T111 |
6 |
|
T112 |
20 |
|
T55 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T111 |
1 |
|
T112 |
21 |
|
T55 |
31 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T111 |
6 |
|
T112 |
20 |
|
T55 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T111 |
1 |
|
T112 |
20 |
|
T55 |
31 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T111 |
6 |
|
T112 |
20 |
|
T55 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T111 |
1 |
|
T112 |
19 |
|
T55 |
30 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T111 |
2 |
|
T112 |
10 |
|
T55 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T111 |
6 |
|
T112 |
20 |
|
T55 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T111 |
5 |
|
T112 |
14 |
|
T55 |
18 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T111 |
1 |
|
T112 |
18 |
|
T55 |
30 |