Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9450214 |
1 |
|
|
T20 |
196369 |
|
T21 |
1 |
|
T22 |
1 |
| auto[1] |
7326101 |
1 |
|
|
T20 |
192851 |
|
T1 |
342 |
|
T11 |
1300 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
15843829 |
1 |
|
|
T20 |
364866 |
|
T21 |
1 |
|
T22 |
1 |
| auto[1] |
932486 |
1 |
|
|
T20 |
24354 |
|
T1 |
11 |
|
T11 |
298 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9422092 |
1 |
|
|
T20 |
192402 |
|
T21 |
1 |
|
T22 |
1 |
| auto[1] |
7354223 |
1 |
|
|
T20 |
196818 |
|
T1 |
280 |
|
T11 |
1472 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
3222870 |
1 |
|
|
T20 |
87051 |
|
T1 |
160 |
|
T11 |
514 |
| auto[1] |
auto[0] |
auto[1] |
467680 |
1 |
|
|
T20 |
12361 |
|
T1 |
6 |
|
T11 |
129 |
| auto[1] |
auto[1] |
auto[0] |
3198867 |
1 |
|
|
T20 |
85413 |
|
T1 |
109 |
|
T11 |
660 |
| auto[1] |
auto[1] |
auto[1] |
464806 |
1 |
|
|
T20 |
11993 |
|
T1 |
5 |
|
T11 |
169 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |