Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9432562 |
1 |
|
|
T20 |
193852 |
|
T21 |
1 |
|
T22 |
1 |
| auto[1] |
7343753 |
1 |
|
|
T20 |
195368 |
|
T1 |
304 |
|
T11 |
1477 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13802685 |
1 |
|
|
T20 |
318265 |
|
T21 |
1 |
|
T22 |
1 |
| auto[1] |
2973630 |
1 |
|
|
T20 |
70955 |
|
T1 |
222 |
|
T11 |
493 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9436822 |
1 |
|
|
T20 |
196368 |
|
T21 |
1 |
|
T22 |
1 |
| auto[1] |
7339493 |
1 |
|
|
T20 |
192852 |
|
T1 |
324 |
|
T11 |
904 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2185353 |
1 |
|
|
T20 |
59286 |
|
T1 |
55 |
|
T11 |
137 |
| auto[1] |
auto[0] |
auto[1] |
1484445 |
1 |
|
|
T20 |
34937 |
|
T1 |
131 |
|
T11 |
175 |
| auto[1] |
auto[1] |
auto[0] |
2180510 |
1 |
|
|
T20 |
62611 |
|
T1 |
47 |
|
T11 |
274 |
| auto[1] |
auto[1] |
auto[1] |
1489185 |
1 |
|
|
T20 |
36018 |
|
T1 |
91 |
|
T11 |
318 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |