Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9440270 |
1 |
|
|
T20 |
190349 |
|
T21 |
1 |
|
T22 |
1 |
| auto[1] |
7336045 |
1 |
|
|
T20 |
198871 |
|
T1 |
240 |
|
T11 |
1079 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13814700 |
1 |
|
|
T20 |
318942 |
|
T21 |
1 |
|
T22 |
1 |
| auto[1] |
2961615 |
1 |
|
|
T20 |
70278 |
|
T1 |
304 |
|
T11 |
602 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9444139 |
1 |
|
|
T20 |
197403 |
|
T21 |
1 |
|
T22 |
1 |
| auto[1] |
7332176 |
1 |
|
|
T20 |
191817 |
|
T1 |
370 |
|
T11 |
1167 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2177659 |
1 |
|
|
T20 |
57034 |
|
T1 |
49 |
|
T11 |
232 |
| auto[1] |
auto[0] |
auto[1] |
1476218 |
1 |
|
|
T20 |
33475 |
|
T1 |
151 |
|
T11 |
297 |
| auto[1] |
auto[1] |
auto[0] |
2192902 |
1 |
|
|
T20 |
64505 |
|
T1 |
17 |
|
T11 |
333 |
| auto[1] |
auto[1] |
auto[1] |
1485397 |
1 |
|
|
T20 |
36803 |
|
T1 |
153 |
|
T11 |
305 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |