Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9429071 |
1 |
|
|
T20 |
190906 |
|
T21 |
1 |
|
T22 |
1 |
| auto[1] |
7347244 |
1 |
|
|
T20 |
198314 |
|
T1 |
301 |
|
T11 |
1253 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13829902 |
1 |
|
|
T20 |
318245 |
|
T21 |
1 |
|
T22 |
1 |
| auto[1] |
2946413 |
1 |
|
|
T20 |
70975 |
|
T1 |
225 |
|
T11 |
700 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9475843 |
1 |
|
|
T20 |
191204 |
|
T21 |
1 |
|
T22 |
1 |
| auto[1] |
7300472 |
1 |
|
|
T20 |
198016 |
|
T1 |
327 |
|
T11 |
1462 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2174515 |
1 |
|
|
T20 |
63330 |
|
T1 |
60 |
|
T11 |
417 |
| auto[1] |
auto[0] |
auto[1] |
1474106 |
1 |
|
|
T20 |
35534 |
|
T1 |
147 |
|
T11 |
390 |
| auto[1] |
auto[1] |
auto[0] |
2179544 |
1 |
|
|
T20 |
63711 |
|
T1 |
42 |
|
T11 |
345 |
| auto[1] |
auto[1] |
auto[1] |
1472307 |
1 |
|
|
T20 |
35441 |
|
T1 |
78 |
|
T11 |
310 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |