Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9439781 |
1 |
|
|
T20 |
199870 |
|
T21 |
1 |
|
T22 |
1 |
auto[1] |
7336534 |
1 |
|
|
T20 |
189350 |
|
T1 |
325 |
|
T11 |
1045 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13837104 |
1 |
|
|
T20 |
317312 |
|
T21 |
1 |
|
T22 |
1 |
auto[1] |
2939211 |
1 |
|
|
T20 |
71908 |
|
T1 |
244 |
|
T11 |
653 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9493525 |
1 |
|
|
T20 |
193617 |
|
T21 |
1 |
|
T22 |
1 |
auto[1] |
7282790 |
1 |
|
|
T20 |
195603 |
|
T1 |
282 |
|
T11 |
1321 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
2169427 |
1 |
|
|
T20 |
64520 |
|
T1 |
27 |
|
T11 |
366 |
auto[1] |
auto[0] |
auto[1] |
1468625 |
1 |
|
|
T20 |
36859 |
|
T1 |
112 |
|
T11 |
335 |
auto[1] |
auto[1] |
auto[0] |
2174152 |
1 |
|
|
T20 |
59175 |
|
T1 |
11 |
|
T11 |
302 |
auto[1] |
auto[1] |
auto[1] |
1470586 |
1 |
|
|
T20 |
35049 |
|
T1 |
132 |
|
T11 |
318 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |