Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9438863 |
1 |
|
|
T20 |
195263 |
|
T21 |
1 |
|
T22 |
1 |
auto[1] |
7337452 |
1 |
|
|
T20 |
193957 |
|
T1 |
392 |
|
T11 |
1307 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13825214 |
1 |
|
|
T20 |
319108 |
|
T21 |
1 |
|
T22 |
1 |
auto[1] |
2951101 |
1 |
|
|
T20 |
70112 |
|
T1 |
161 |
|
T11 |
556 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9447370 |
1 |
|
|
T20 |
193392 |
|
T21 |
1 |
|
T22 |
1 |
auto[1] |
7328945 |
1 |
|
|
T20 |
195828 |
|
T1 |
242 |
|
T11 |
1119 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
2183058 |
1 |
|
|
T20 |
60796 |
|
T1 |
36 |
|
T11 |
241 |
auto[1] |
auto[0] |
auto[1] |
1472850 |
1 |
|
|
T20 |
34588 |
|
T1 |
98 |
|
T11 |
231 |
auto[1] |
auto[1] |
auto[0] |
2194786 |
1 |
|
|
T20 |
64920 |
|
T1 |
45 |
|
T11 |
322 |
auto[1] |
auto[1] |
auto[1] |
1478251 |
1 |
|
|
T20 |
35524 |
|
T1 |
63 |
|
T11 |
325 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |