Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9506420 |
1 |
|
|
T20 |
202656 |
|
T21 |
1 |
|
T22 |
1 |
| auto[1] |
7269895 |
1 |
|
|
T20 |
186564 |
|
T1 |
224 |
|
T11 |
910 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
15843373 |
1 |
|
|
T20 |
365273 |
|
T21 |
1 |
|
T22 |
1 |
| auto[1] |
932942 |
1 |
|
|
T20 |
23947 |
|
T1 |
6 |
|
T11 |
261 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9414327 |
1 |
|
|
T20 |
194176 |
|
T21 |
1 |
|
T22 |
1 |
| auto[1] |
7361988 |
1 |
|
|
T20 |
195044 |
|
T1 |
271 |
|
T11 |
1288 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
3235421 |
1 |
|
|
T20 |
87200 |
|
T1 |
162 |
|
T11 |
642 |
| auto[1] |
auto[0] |
auto[1] |
470308 |
1 |
|
|
T20 |
12084 |
|
T1 |
5 |
|
T11 |
171 |
| auto[1] |
auto[1] |
auto[0] |
3193625 |
1 |
|
|
T20 |
83897 |
|
T1 |
103 |
|
T11 |
385 |
| auto[1] |
auto[1] |
auto[1] |
462634 |
1 |
|
|
T20 |
11863 |
|
T1 |
1 |
|
T11 |
90 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |