Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9483628 |
1 |
|
|
T20 |
200903 |
|
T21 |
1 |
|
T22 |
1 |
| auto[1] |
7292687 |
1 |
|
|
T20 |
188317 |
|
T1 |
284 |
|
T11 |
1276 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
15853867 |
1 |
|
|
T20 |
365893 |
|
T21 |
1 |
|
T22 |
1 |
| auto[1] |
922448 |
1 |
|
|
T20 |
23327 |
|
T1 |
12 |
|
T11 |
256 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9488564 |
1 |
|
|
T20 |
198899 |
|
T21 |
1 |
|
T22 |
1 |
| auto[1] |
7287751 |
1 |
|
|
T20 |
190321 |
|
T1 |
350 |
|
T11 |
1291 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
3199780 |
1 |
|
|
T20 |
86602 |
|
T1 |
189 |
|
T11 |
542 |
| auto[1] |
auto[0] |
auto[1] |
464340 |
1 |
|
|
T20 |
12018 |
|
T1 |
6 |
|
T11 |
145 |
| auto[1] |
auto[1] |
auto[0] |
3165523 |
1 |
|
|
T20 |
80392 |
|
T1 |
149 |
|
T11 |
493 |
| auto[1] |
auto[1] |
auto[1] |
458108 |
1 |
|
|
T20 |
11309 |
|
T1 |
6 |
|
T11 |
111 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |