Group : cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}
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Group : cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv



Summary for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 36 0 36 100.00
Crosses 128 0 128 100.00


Variables for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_intr 32 0 32 100.00 100 1 1 0
cp_intr_en 2 0 2 100.00 100 1 1 2
cp_intr_state 2 0 2 100.00 100 1 1 2


Crosses for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
intr_cg_cc 128 0 128 100.00 100 1 1 0


Summary for Variable cp_intr

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 32 0 32 100.00


User Defined Bins for cp_intr

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 13994598 1 T22 192 T23 280 T24 317
all_values[1] 13994598 1 T22 192 T23 280 T24 317
all_values[2] 13994598 1 T22 192 T23 280 T24 317
all_values[3] 13994598 1 T22 192 T23 280 T24 317
all_values[4] 13994598 1 T22 192 T23 280 T24 317
all_values[5] 13994598 1 T22 192 T23 280 T24 317
all_values[6] 13994598 1 T22 192 T23 280 T24 317
all_values[7] 13994598 1 T22 192 T23 280 T24 317
all_values[8] 13994598 1 T22 192 T23 280 T24 317
all_values[9] 13994598 1 T22 192 T23 280 T24 317
all_values[10] 13994598 1 T22 192 T23 280 T24 317
all_values[11] 13994598 1 T22 192 T23 280 T24 317
all_values[12] 13994598 1 T22 192 T23 280 T24 317
all_values[13] 13994598 1 T22 192 T23 280 T24 317
all_values[14] 13994598 1 T22 192 T23 280 T24 317
all_values[15] 13994598 1 T22 192 T23 280 T24 317
all_values[16] 13994598 1 T22 192 T23 280 T24 317
all_values[17] 13994598 1 T22 192 T23 280 T24 317
all_values[18] 13994598 1 T22 192 T23 280 T24 317
all_values[19] 13994598 1 T22 192 T23 280 T24 317
all_values[20] 13994598 1 T22 192 T23 280 T24 317
all_values[21] 13994598 1 T22 192 T23 280 T24 317
all_values[22] 13994598 1 T22 192 T23 280 T24 317
all_values[23] 13994598 1 T22 192 T23 280 T24 317
all_values[24] 13994598 1 T22 192 T23 280 T24 317
all_values[25] 13994598 1 T22 192 T23 280 T24 317
all_values[26] 13994598 1 T22 192 T23 280 T24 317
all_values[27] 13994598 1 T22 192 T23 280 T24 317
all_values[28] 13994598 1 T22 192 T23 280 T24 317
all_values[29] 13994598 1 T22 192 T23 280 T24 317
all_values[30] 13994598 1 T22 192 T23 280 T24 317
all_values[31] 13994598 1 T22 192 T23 280 T24 317



Summary for Variable cp_intr_en

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_intr_en

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 258849174 1 T22 6144 T23 4493 T24 10144
auto[1] 188977962 1 T23 4467 T27 3307 T29 2544



Summary for Variable cp_intr_state

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_intr_state

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 105733219 1 T22 6144 T23 1520 T24 10144
auto[1] 342093917 1 T23 7440 T27 6188 T29 4345



Summary for Cross intr_cg_cc

Samples crossed: cp_intr cp_intr_en cp_intr_state
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 128 0 128 100.00


Automatically Generated Cross Bins for intr_cg_cc

Bins
cp_intrcp_intr_encp_intr_stateCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] auto[0] auto[0] 2721493 1 T22 192 T23 23 T24 317
all_values[0] auto[0] auto[1] 5402639 1 T23 103 T27 85 T29 137
all_values[0] auto[1] auto[0] 564955 1 T23 29 T27 20 T1 28
all_values[0] auto[1] auto[1] 5305511 1 T23 125 T27 105 T29 13
all_values[1] auto[0] auto[0] 2725191 1 T22 192 T23 21 T24 317
all_values[1] auto[0] auto[1] 5319896 1 T23 128 T27 131 T29 60
all_values[1] auto[1] auto[0] 569861 1 T23 8 T27 8 T29 5
all_values[1] auto[1] auto[1] 5379650 1 T23 123 T27 72 T29 97
all_values[2] auto[0] auto[0] 2727572 1 T22 192 T23 7 T24 317
all_values[2] auto[0] auto[1] 5344174 1 T23 79 T27 116 T29 118
all_values[2] auto[1] auto[0] 569340 1 T23 38 T27 19 T1 24
all_values[2] auto[1] auto[1] 5353512 1 T23 156 T27 83 T29 21
all_values[3] auto[0] auto[0] 2731121 1 T22 192 T23 50 T24 317
all_values[3] auto[0] auto[1] 5343853 1 T23 118 T27 105 T29 61
all_values[3] auto[1] auto[0] 584623 1 T23 33 T27 11 T29 6
all_values[3] auto[1] auto[1] 5335001 1 T23 79 T27 97 T29 82
all_values[4] auto[0] auto[0] 2742661 1 T22 192 T23 20 T24 317
all_values[4] auto[0] auto[1] 5350163 1 T23 97 T27 122 T29 89
all_values[4] auto[1] auto[0] 571369 1 T23 54 T27 9 T29 9
all_values[4] auto[1] auto[1] 5330405 1 T23 109 T27 69 T29 47
all_values[5] auto[0] auto[0] 2734671 1 T22 192 T23 8 T24 317
all_values[5] auto[0] auto[1] 5340523 1 T23 106 T27 151 T29 68
all_values[5] auto[1] auto[0] 571319 1 T23 36 T27 12 T29 23
all_values[5] auto[1] auto[1] 5348085 1 T23 130 T27 49 T29 65
all_values[6] auto[0] auto[0] 2729809 1 T22 192 T23 35 T24 317
all_values[6] auto[0] auto[1] 5341659 1 T23 129 T27 86 T29 81
all_values[6] auto[1] auto[0] 578858 1 T23 12 T27 6 T29 33
all_values[6] auto[1] auto[1] 5344272 1 T23 104 T27 116 T29 38
all_values[7] auto[0] auto[0] 2735615 1 T22 192 T23 21 T24 317
all_values[7] auto[0] auto[1] 5371110 1 T23 49 T27 98 T29 27
all_values[7] auto[1] auto[0] 576719 1 T23 29 T27 21 T29 38
all_values[7] auto[1] auto[1] 5311154 1 T23 181 T27 80 T29 99
all_values[8] auto[0] auto[0] 2736370 1 T22 192 T23 24 T24 317
all_values[8] auto[0] auto[1] 5348611 1 T23 69 T27 82 T29 74
all_values[8] auto[1] auto[0] 567734 1 T23 21 T27 11 T29 11
all_values[8] auto[1] auto[1] 5341883 1 T23 166 T27 118 T29 61
all_values[9] auto[0] auto[0] 2732395 1 T22 192 T23 32 T24 317
all_values[9] auto[0] auto[1] 5357089 1 T23 112 T27 95 T29 23
all_values[9] auto[1] auto[0] 572740 1 T23 44 T27 20 T29 28
all_values[9] auto[1] auto[1] 5332374 1 T23 92 T27 94 T29 112
all_values[10] auto[0] auto[0] 2745441 1 T22 192 T23 19 T24 317
all_values[10] auto[0] auto[1] 5344893 1 T23 154 T27 110 T29 39
all_values[10] auto[1] auto[0] 570971 1 T23 8 T27 2 T29 40
all_values[10] auto[1] auto[1] 5333293 1 T23 99 T27 109 T29 85
all_values[11] auto[0] auto[0] 2734276 1 T22 192 T23 16 T24 317
all_values[11] auto[0] auto[1] 5338652 1 T23 166 T27 104 T29 90
all_values[11] auto[1] auto[0] 569499 1 T23 18 T27 16 T29 7
all_values[11] auto[1] auto[1] 5352171 1 T23 80 T27 95 T29 49
all_values[12] auto[0] auto[0] 2728610 1 T22 192 T23 42 T24 317
all_values[12] auto[0] auto[1] 5369302 1 T23 85 T27 76 T29 117
all_values[12] auto[1] auto[0] 568869 1 T23 14 T27 14 T29 16
all_values[12] auto[1] auto[1] 5327817 1 T23 139 T27 127 T29 23
all_values[13] auto[0] auto[0] 2741752 1 T22 192 T23 11 T24 317
all_values[13] auto[0] auto[1] 5363348 1 T23 146 T27 161 T29 45
all_values[13] auto[1] auto[0] 567085 1 T23 13 T29 44 T1 20
all_values[13] auto[1] auto[1] 5322413 1 T23 110 T27 47 T29 54
all_values[14] auto[0] auto[0] 2736635 1 T22 192 T23 26 T24 317
all_values[14] auto[0] auto[1] 5335775 1 T23 138 T27 85 T29 32
all_values[14] auto[1] auto[0] 564287 1 T23 10 T27 5 T29 23
all_values[14] auto[1] auto[1] 5357901 1 T23 106 T27 128 T29 100
all_values[15] auto[0] auto[0] 2744947 1 T22 192 T23 30 T24 317
all_values[15] auto[0] auto[1] 5340512 1 T23 136 T27 143 T29 108
all_values[15] auto[1] auto[0] 566496 1 T23 2 T27 10 T29 7
all_values[15] auto[1] auto[1] 5342643 1 T23 112 T27 62 T29 41
all_values[16] auto[0] auto[0] 2732159 1 T22 192 T23 18 T24 317
all_values[16] auto[0] auto[1] 5351090 1 T23 126 T27 107 T29 56
all_values[16] auto[1] auto[0] 569898 1 T23 20 T27 7 T29 20
all_values[16] auto[1] auto[1] 5341451 1 T23 116 T27 92 T29 46
all_values[17] auto[0] auto[0] 2734132 1 T22 192 T23 12 T24 317
all_values[17] auto[0] auto[1] 5345304 1 T23 134 T27 126 T29 43
all_values[17] auto[1] auto[0] 569821 1 T23 29 T27 11 T29 17
all_values[17] auto[1] auto[1] 5345341 1 T23 105 T27 58 T29 90
all_values[18] auto[0] auto[0] 2732939 1 T22 192 T23 36 T24 317
all_values[18] auto[0] auto[1] 5377644 1 T23 84 T27 98 T29 82
all_values[18] auto[1] auto[0] 574443 1 T23 21 T27 25 T29 6
all_values[18] auto[1] auto[1] 5309572 1 T23 139 T27 73 T29 54
all_values[19] auto[0] auto[0] 2731024 1 T22 192 T23 25 T24 317
all_values[19] auto[0] auto[1] 5394321 1 T23 115 T27 75 T29 81
all_values[19] auto[1] auto[0] 568225 1 T23 33 T27 11 T29 8
all_values[19] auto[1] auto[1] 5301028 1 T23 107 T27 124 T29 73
all_values[20] auto[0] auto[0] 2738931 1 T22 192 T23 30 T24 317
all_values[20] auto[0] auto[1] 5348649 1 T23 152 T27 93 T29 64
all_values[20] auto[1] auto[0] 571377 1 T23 26 T27 6 T29 12
all_values[20] auto[1] auto[1] 5335641 1 T23 72 T27 113 T29 84
all_values[21] auto[0] auto[0] 2734893 1 T22 192 T23 32 T24 317
all_values[21] auto[0] auto[1] 5373628 1 T23 100 T27 60 T29 61
all_values[21] auto[1] auto[0] 567918 1 T23 25 T27 35 T29 20
all_values[21] auto[1] auto[1] 5318159 1 T23 123 T27 115 T29 52
all_values[22] auto[0] auto[0] 2739089 1 T22 192 T23 50 T24 317
all_values[22] auto[0] auto[1] 5310183 1 T23 131 T27 111 T29 69
all_values[22] auto[1] auto[0] 566677 1 T23 9 T27 30 T29 9
all_values[22] auto[1] auto[1] 5378649 1 T23 90 T27 62 T29 64
all_values[23] auto[0] auto[0] 2730677 1 T22 192 T23 25 T24 317
all_values[23] auto[0] auto[1] 5381149 1 T23 138 T27 146 T29 97
all_values[23] auto[1] auto[0] 567953 1 T23 15 T29 10 T1 44
all_values[23] auto[1] auto[1] 5314819 1 T23 102 T27 61 T29 43
all_values[24] auto[0] auto[0] 2725963 1 T22 192 T23 8 T24 317
all_values[24] auto[0] auto[1] 5337442 1 T23 83 T27 97 T29 98
all_values[24] auto[1] auto[0] 564920 1 T23 19 T27 20 T29 21
all_values[24] auto[1] auto[1] 5366273 1 T23 170 T27 84 T29 29
all_values[25] auto[0] auto[0] 2735743 1 T22 192 T23 33 T24 317
all_values[25] auto[0] auto[1] 5390047 1 T23 128 T27 86 T29 44
all_values[25] auto[1] auto[0] 570113 1 T23 27 T27 29 T29 5
all_values[25] auto[1] auto[1] 5298695 1 T23 92 T27 72 T29 98
all_values[26] auto[0] auto[0] 2733476 1 T22 192 T23 10 T24 317
all_values[26] auto[0] auto[1] 5369580 1 T23 104 T27 48 T29 93
all_values[26] auto[1] auto[0] 572313 1 T23 31 T27 16 T1 10
all_values[26] auto[1] auto[1] 5319229 1 T23 135 T27 124 T29 60
all_values[27] auto[0] auto[0] 2736825 1 T22 192 T23 8 T24 317
all_values[27] auto[0] auto[1] 5357814 1 T23 130 T27 133 T29 90
all_values[27] auto[1] auto[0] 573445 1 T23 33 T27 10 T29 11
all_values[27] auto[1] auto[1] 5326514 1 T23 109 T27 70 T29 54
all_values[28] auto[0] auto[0] 2722833 1 T22 192 T23 14 T24 317
all_values[28] auto[0] auto[1] 5325996 1 T23 152 T27 88 T29 70
all_values[28] auto[1] auto[0] 570711 1 T23 4 T27 20 T29 11
all_values[28] auto[1] auto[1] 5375058 1 T23 110 T27 100 T29 63
all_values[29] auto[0] auto[0] 2736700 1 T22 192 T23 51 T24 317
all_values[29] auto[0] auto[1] 5363301 1 T23 154 T27 87 T29 43
all_values[29] auto[1] auto[0] 567920 1 T23 8 T27 4 T29 6
all_values[29] auto[1] auto[1] 5326677 1 T23 67 T27 102 T29 102
all_values[30] auto[0] auto[0] 2739742 1 T22 192 T23 12 T24 317
all_values[30] auto[0] auto[1] 5352120 1 T23 69 T27 124 T29 45
all_values[30] auto[1] auto[0] 571829 1 T23 38 T27 21 T29 7
all_values[30] auto[1] auto[1] 5330907 1 T23 161 T27 64 T29 105
all_values[31] auto[0] auto[0] 2735250 1 T22 192 T23 31 T24 317
all_values[31] auto[0] auto[1] 5369772 1 T23 98 T27 96 T29 64
all_values[31] auto[1] auto[0] 561996 1 T23 33 T27 15 T29 15
all_values[31] auto[1] auto[1] 5327580 1 T23 118 T27 98 T29 72

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