cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63277 |
1 |
|
|
T17 |
956 |
|
T30 |
334 |
|
T105 |
950 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45986 |
1 |
|
|
T17 |
505 |
|
T30 |
95 |
|
T105 |
246 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59540 |
1 |
|
|
T17 |
1018 |
|
T30 |
1186 |
|
T105 |
210 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44620 |
1 |
|
|
T17 |
865 |
|
T30 |
129 |
|
T105 |
205 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T17 |
23 |
|
T30 |
5 |
|
T105 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1655 |
1 |
|
|
T17 |
25 |
|
T30 |
6 |
|
T105 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T17 |
23 |
|
T30 |
5 |
|
T105 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T17 |
25 |
|
T30 |
6 |
|
T105 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T17 |
23 |
|
T30 |
5 |
|
T105 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T17 |
25 |
|
T30 |
6 |
|
T105 |
14 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T17 |
23 |
|
T30 |
5 |
|
T105 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T17 |
24 |
|
T30 |
6 |
|
T105 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T17 |
21 |
|
T30 |
5 |
|
T105 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T17 |
24 |
|
T30 |
6 |
|
T105 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T17 |
21 |
|
T30 |
5 |
|
T105 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T17 |
24 |
|
T30 |
6 |
|
T105 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T17 |
21 |
|
T30 |
5 |
|
T105 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T17 |
23 |
|
T30 |
5 |
|
T105 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T17 |
20 |
|
T30 |
5 |
|
T105 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T17 |
23 |
|
T30 |
5 |
|
T105 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T17 |
20 |
|
T30 |
5 |
|
T105 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T17 |
23 |
|
T30 |
5 |
|
T105 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T17 |
19 |
|
T30 |
5 |
|
T105 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T17 |
22 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T17 |
18 |
|
T30 |
5 |
|
T105 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T17 |
21 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T17 |
17 |
|
T30 |
5 |
|
T105 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T17 |
20 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T17 |
15 |
|
T30 |
4 |
|
T105 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T17 |
11 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T17 |
20 |
|
T30 |
5 |
|
T105 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T17 |
15 |
|
T30 |
3 |
|
T105 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T17 |
11 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T17 |
20 |
|
T30 |
5 |
|
T105 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T17 |
14 |
|
T30 |
3 |
|
T105 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T17 |
11 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T17 |
19 |
|
T30 |
5 |
|
T105 |
7 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50605 |
1 |
|
|
T17 |
893 |
|
T30 |
117 |
|
T105 |
203 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52452 |
1 |
|
|
T17 |
972 |
|
T30 |
116 |
|
T105 |
208 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56854 |
1 |
|
|
T17 |
980 |
|
T30 |
327 |
|
T105 |
242 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52144 |
1 |
|
|
T17 |
280 |
|
T30 |
1193 |
|
T105 |
1078 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T17 |
20 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1785 |
1 |
|
|
T17 |
23 |
|
T30 |
7 |
|
T105 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T17 |
21 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1821 |
1 |
|
|
T17 |
22 |
|
T30 |
8 |
|
T105 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T17 |
20 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1757 |
1 |
|
|
T17 |
23 |
|
T30 |
7 |
|
T105 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T17 |
21 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1789 |
1 |
|
|
T17 |
21 |
|
T30 |
8 |
|
T105 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T17 |
20 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1721 |
1 |
|
|
T17 |
23 |
|
T30 |
7 |
|
T105 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T17 |
21 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1753 |
1 |
|
|
T17 |
20 |
|
T30 |
8 |
|
T105 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T17 |
20 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1683 |
1 |
|
|
T17 |
23 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T17 |
21 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1716 |
1 |
|
|
T17 |
19 |
|
T30 |
8 |
|
T105 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T17 |
20 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T17 |
23 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T17 |
21 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T17 |
19 |
|
T30 |
8 |
|
T105 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T17 |
20 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1616 |
1 |
|
|
T17 |
23 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T17 |
21 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T17 |
18 |
|
T30 |
8 |
|
T105 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T17 |
20 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T17 |
23 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T17 |
21 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T17 |
18 |
|
T30 |
8 |
|
T105 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T17 |
20 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T17 |
23 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T17 |
21 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T17 |
18 |
|
T30 |
8 |
|
T105 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T17 |
20 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T17 |
22 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T17 |
20 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T17 |
20 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T17 |
21 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T17 |
20 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T17 |
20 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T17 |
21 |
|
T30 |
6 |
|
T105 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T17 |
20 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T17 |
20 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T17 |
21 |
|
T30 |
6 |
|
T105 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T17 |
20 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T17 |
15 |
|
T30 |
7 |
|
T105 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T17 |
20 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T17 |
21 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T17 |
20 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T17 |
15 |
|
T30 |
7 |
|
T105 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T17 |
20 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T17 |
19 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T17 |
20 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T17 |
12 |
|
T30 |
7 |
|
T105 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T17 |
20 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T17 |
19 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T17 |
20 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T17 |
11 |
|
T30 |
7 |
|
T105 |
8 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63278 |
1 |
|
|
T17 |
1103 |
|
T30 |
377 |
|
T105 |
285 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43124 |
1 |
|
|
T17 |
636 |
|
T30 |
1090 |
|
T105 |
211 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57601 |
1 |
|
|
T17 |
901 |
|
T30 |
262 |
|
T105 |
196 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48981 |
1 |
|
|
T17 |
608 |
|
T30 |
102 |
|
T105 |
937 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1737 |
1 |
|
|
T17 |
29 |
|
T30 |
5 |
|
T105 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1742 |
1 |
|
|
T17 |
27 |
|
T30 |
3 |
|
T105 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1701 |
1 |
|
|
T17 |
29 |
|
T30 |
4 |
|
T105 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T17 |
27 |
|
T30 |
3 |
|
T105 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1672 |
1 |
|
|
T17 |
28 |
|
T30 |
4 |
|
T105 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T17 |
27 |
|
T30 |
3 |
|
T105 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T17 |
27 |
|
T30 |
4 |
|
T105 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T17 |
26 |
|
T30 |
2 |
|
T105 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T17 |
25 |
|
T30 |
4 |
|
T105 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T17 |
25 |
|
T30 |
2 |
|
T105 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T17 |
25 |
|
T30 |
4 |
|
T105 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T17 |
25 |
|
T30 |
2 |
|
T105 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T17 |
25 |
|
T30 |
4 |
|
T105 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T17 |
25 |
|
T30 |
2 |
|
T105 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T17 |
25 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T17 |
25 |
|
T30 |
2 |
|
T105 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T17 |
23 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T17 |
24 |
|
T30 |
3 |
|
T105 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T17 |
22 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T17 |
24 |
|
T30 |
3 |
|
T105 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T17 |
21 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T17 |
22 |
|
T30 |
3 |
|
T105 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T17 |
20 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T17 |
22 |
|
T30 |
3 |
|
T105 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T17 |
20 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T17 |
22 |
|
T30 |
2 |
|
T105 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T17 |
19 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T17 |
21 |
|
T30 |
2 |
|
T105 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T17 |
19 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T17 |
20 |
|
T30 |
2 |
|
T105 |
7 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54010 |
1 |
|
|
T17 |
1775 |
|
T30 |
231 |
|
T105 |
272 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46407 |
1 |
|
|
T17 |
397 |
|
T30 |
128 |
|
T105 |
164 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58079 |
1 |
|
|
T17 |
867 |
|
T30 |
267 |
|
T105 |
1171 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52828 |
1 |
|
|
T17 |
369 |
|
T30 |
1123 |
|
T105 |
133 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1797 |
1 |
|
|
T17 |
21 |
|
T30 |
7 |
|
T105 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T17 |
19 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1804 |
1 |
|
|
T17 |
14 |
|
T30 |
6 |
|
T105 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1764 |
1 |
|
|
T17 |
20 |
|
T30 |
7 |
|
T105 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T17 |
19 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1765 |
1 |
|
|
T17 |
13 |
|
T30 |
6 |
|
T105 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1726 |
1 |
|
|
T17 |
20 |
|
T30 |
7 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T17 |
19 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1740 |
1 |
|
|
T17 |
13 |
|
T30 |
6 |
|
T105 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T17 |
20 |
|
T30 |
7 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T17 |
19 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1707 |
1 |
|
|
T17 |
12 |
|
T30 |
6 |
|
T105 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T17 |
20 |
|
T30 |
7 |
|
T105 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T17 |
19 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1680 |
1 |
|
|
T17 |
12 |
|
T30 |
6 |
|
T105 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T17 |
20 |
|
T30 |
7 |
|
T105 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T17 |
19 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T17 |
12 |
|
T30 |
6 |
|
T105 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T17 |
20 |
|
T30 |
7 |
|
T105 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T17 |
19 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T17 |
20 |
|
T30 |
7 |
|
T105 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T17 |
19 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T17 |
19 |
|
T30 |
7 |
|
T105 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T17 |
18 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T17 |
18 |
|
T30 |
6 |
|
T105 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T17 |
18 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T17 |
11 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T17 |
18 |
|
T30 |
6 |
|
T105 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
18 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T17 |
11 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T17 |
17 |
|
T30 |
6 |
|
T105 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
18 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T17 |
11 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T17 |
16 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T17 |
18 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T17 |
10 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T17 |
15 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T17 |
18 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T17 |
10 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T17 |
15 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T17 |
18 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T17 |
10 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56837 |
1 |
|
|
T17 |
810 |
|
T30 |
370 |
|
T105 |
295 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47105 |
1 |
|
|
T17 |
586 |
|
T30 |
104 |
|
T105 |
821 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59148 |
1 |
|
|
T17 |
1207 |
|
T30 |
1253 |
|
T105 |
525 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49896 |
1 |
|
|
T17 |
628 |
|
T30 |
70 |
|
T105 |
112 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T17 |
7 |
|
T30 |
3 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1736 |
1 |
|
|
T17 |
34 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1717 |
1 |
|
|
T17 |
31 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T17 |
7 |
|
T30 |
3 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1698 |
1 |
|
|
T17 |
34 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1685 |
1 |
|
|
T17 |
31 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T17 |
7 |
|
T30 |
3 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T17 |
31 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1657 |
1 |
|
|
T17 |
30 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T17 |
7 |
|
T30 |
3 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T17 |
31 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T17 |
30 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
7 |
|
T30 |
3 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T17 |
28 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T17 |
28 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
7 |
|
T30 |
3 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T17 |
28 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T17 |
27 |
|
T30 |
2 |
|
T105 |
2 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
7 |
|
T30 |
3 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T17 |
26 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T17 |
27 |
|
T30 |
2 |
|
T105 |
2 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
7 |
|
T30 |
3 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T17 |
26 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T17 |
27 |
|
T30 |
2 |
|
T105 |
2 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T17 |
7 |
|
T30 |
3 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T17 |
26 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T17 |
26 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T17 |
7 |
|
T30 |
3 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T17 |
26 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T17 |
25 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T17 |
7 |
|
T30 |
3 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T17 |
26 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T17 |
25 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T17 |
7 |
|
T30 |
3 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T17 |
26 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T17 |
24 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T17 |
7 |
|
T30 |
3 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T17 |
26 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T17 |
24 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T17 |
7 |
|
T30 |
3 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T17 |
25 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T17 |
23 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T17 |
7 |
|
T30 |
3 |
|
T105 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T17 |
25 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T17 |
23 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57936 |
1 |
|
|
T17 |
972 |
|
T30 |
186 |
|
T105 |
446 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
54763 |
1 |
|
|
T17 |
1096 |
|
T30 |
1127 |
|
T105 |
866 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51724 |
1 |
|
|
T17 |
538 |
|
T30 |
265 |
|
T105 |
386 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47169 |
1 |
|
|
T17 |
543 |
|
T30 |
133 |
|
T105 |
70 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1809 |
1 |
|
|
T17 |
31 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1805 |
1 |
|
|
T17 |
31 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1780 |
1 |
|
|
T17 |
29 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1768 |
1 |
|
|
T17 |
31 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1746 |
1 |
|
|
T17 |
28 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1734 |
1 |
|
|
T17 |
31 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1709 |
1 |
|
|
T17 |
27 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1690 |
1 |
|
|
T17 |
30 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1690 |
1 |
|
|
T17 |
27 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T17 |
29 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1659 |
1 |
|
|
T17 |
27 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T17 |
29 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T17 |
27 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T17 |
29 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T17 |
27 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T17 |
27 |
|
T30 |
8 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T17 |
27 |
|
T30 |
7 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T17 |
27 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T17 |
25 |
|
T30 |
7 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T17 |
25 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T17 |
24 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T17 |
23 |
|
T30 |
7 |
|
T105 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T17 |
23 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T17 |
23 |
|
T30 |
7 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T17 |
23 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T17 |
23 |
|
T30 |
7 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T17 |
23 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T17 |
20 |
|
T30 |
7 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T17 |
23 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T17 |
19 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56776 |
1 |
|
|
T17 |
1434 |
|
T30 |
173 |
|
T105 |
1135 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40261 |
1 |
|
|
T17 |
601 |
|
T30 |
309 |
|
T105 |
164 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60850 |
1 |
|
|
T17 |
915 |
|
T30 |
1122 |
|
T105 |
376 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
54079 |
1 |
|
|
T17 |
382 |
|
T30 |
108 |
|
T105 |
53 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T17 |
15 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1710 |
1 |
|
|
T17 |
20 |
|
T30 |
10 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T17 |
16 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1732 |
1 |
|
|
T17 |
19 |
|
T30 |
9 |
|
T105 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T17 |
15 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T17 |
20 |
|
T30 |
10 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T17 |
16 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1701 |
1 |
|
|
T17 |
19 |
|
T30 |
9 |
|
T105 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T17 |
15 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T17 |
20 |
|
T30 |
10 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T17 |
16 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1673 |
1 |
|
|
T17 |
18 |
|
T30 |
9 |
|
T105 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T17 |
15 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T17 |
20 |
|
T30 |
10 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T17 |
16 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T17 |
18 |
|
T30 |
8 |
|
T105 |
2 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T17 |
15 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T17 |
20 |
|
T30 |
10 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T17 |
16 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
2 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T17 |
15 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T17 |
20 |
|
T30 |
10 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T17 |
16 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
2 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T17 |
15 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T17 |
20 |
|
T30 |
10 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T17 |
16 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
2 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T17 |
15 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T17 |
20 |
|
T30 |
10 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T17 |
16 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T17 |
16 |
|
T30 |
7 |
|
T105 |
2 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T17 |
15 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T17 |
20 |
|
T30 |
10 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T17 |
15 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T17 |
15 |
|
T30 |
7 |
|
T105 |
2 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T17 |
15 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T17 |
20 |
|
T30 |
10 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T17 |
15 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T17 |
14 |
|
T30 |
7 |
|
T105 |
1 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T17 |
15 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T17 |
20 |
|
T30 |
9 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T17 |
15 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T17 |
14 |
|
T30 |
6 |
|
T105 |
1 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T17 |
15 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T17 |
20 |
|
T30 |
9 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T17 |
15 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
1 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T17 |
15 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T17 |
20 |
|
T30 |
9 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T17 |
15 |
|
T30 |
3 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
1 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T17 |
15 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T17 |
19 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T17 |
15 |
|
T30 |
3 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T17 |
11 |
|
T30 |
4 |
|
T105 |
1 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T17 |
15 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T17 |
19 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T17 |
15 |
|
T30 |
3 |
|
T105 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T17 |
11 |
|
T30 |
4 |
|
T105 |
1 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60317 |
1 |
|
|
T17 |
803 |
|
T30 |
1101 |
|
T105 |
410 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47325 |
1 |
|
|
T17 |
1078 |
|
T30 |
285 |
|
T105 |
103 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59898 |
1 |
|
|
T17 |
786 |
|
T30 |
136 |
|
T105 |
140 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45004 |
1 |
|
|
T17 |
597 |
|
T30 |
193 |
|
T105 |
1008 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T17 |
8 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1719 |
1 |
|
|
T17 |
31 |
|
T30 |
9 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1721 |
1 |
|
|
T17 |
28 |
|
T30 |
10 |
|
T105 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T17 |
8 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1691 |
1 |
|
|
T17 |
29 |
|
T30 |
9 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1692 |
1 |
|
|
T17 |
27 |
|
T30 |
10 |
|
T105 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T17 |
8 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1662 |
1 |
|
|
T17 |
29 |
|
T30 |
9 |
|
T105 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1656 |
1 |
|
|
T17 |
27 |
|
T30 |
10 |
|
T105 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T17 |
8 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T17 |
29 |
|
T30 |
8 |
|
T105 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T17 |
27 |
|
T30 |
9 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T17 |
8 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T17 |
29 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T17 |
26 |
|
T30 |
8 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T17 |
8 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T17 |
28 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T17 |
25 |
|
T30 |
8 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T17 |
8 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T17 |
27 |
|
T30 |
8 |
|
T105 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T17 |
25 |
|
T30 |
7 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T17 |
8 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T17 |
27 |
|
T30 |
8 |
|
T105 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T17 |
25 |
|
T30 |
7 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T17 |
8 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T17 |
25 |
|
T30 |
7 |
|
T105 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T17 |
25 |
|
T30 |
7 |
|
T105 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T17 |
8 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T17 |
24 |
|
T30 |
7 |
|
T105 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T17 |
25 |
|
T30 |
6 |
|
T105 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T17 |
8 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T17 |
23 |
|
T30 |
7 |
|
T105 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T17 |
25 |
|
T30 |
6 |
|
T105 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T17 |
8 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T17 |
23 |
|
T30 |
7 |
|
T105 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T17 |
25 |
|
T30 |
6 |
|
T105 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T17 |
8 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T17 |
23 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T17 |
11 |
|
T30 |
2 |
|
T105 |
2 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T17 |
23 |
|
T30 |
6 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T17 |
8 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T17 |
23 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T17 |
11 |
|
T30 |
2 |
|
T105 |
2 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T17 |
23 |
|
T30 |
6 |
|
T105 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T17 |
8 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T17 |
23 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T17 |
11 |
|
T30 |
2 |
|
T105 |
2 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T17 |
22 |
|
T30 |
6 |
|
T105 |
10 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53232 |
1 |
|
|
T17 |
598 |
|
T30 |
1004 |
|
T105 |
1201 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44163 |
1 |
|
|
T17 |
597 |
|
T30 |
220 |
|
T105 |
191 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62575 |
1 |
|
|
T17 |
1467 |
|
T30 |
279 |
|
T105 |
166 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52796 |
1 |
|
|
T17 |
604 |
|
T30 |
164 |
|
T105 |
155 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1722 |
1 |
|
|
T17 |
28 |
|
T30 |
11 |
|
T105 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1742 |
1 |
|
|
T17 |
30 |
|
T30 |
10 |
|
T105 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1701 |
1 |
|
|
T17 |
27 |
|
T30 |
11 |
|
T105 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1712 |
1 |
|
|
T17 |
29 |
|
T30 |
10 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T17 |
27 |
|
T30 |
11 |
|
T105 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1683 |
1 |
|
|
T17 |
26 |
|
T30 |
9 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T17 |
26 |
|
T30 |
11 |
|
T105 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1654 |
1 |
|
|
T17 |
25 |
|
T30 |
9 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T17 |
25 |
|
T30 |
11 |
|
T105 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T17 |
24 |
|
T30 |
9 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T17 |
25 |
|
T30 |
11 |
|
T105 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T17 |
23 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T17 |
25 |
|
T30 |
10 |
|
T105 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T17 |
22 |
|
T30 |
8 |
|
T105 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T17 |
24 |
|
T30 |
10 |
|
T105 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T17 |
22 |
|
T30 |
8 |
|
T105 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T17 |
23 |
|
T30 |
9 |
|
T105 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T17 |
20 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T17 |
23 |
|
T30 |
8 |
|
T105 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T17 |
17 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T17 |
23 |
|
T30 |
8 |
|
T105 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T17 |
17 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T17 |
23 |
|
T30 |
8 |
|
T105 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T17 |
17 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T17 |
23 |
|
T30 |
8 |
|
T105 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T17 |
17 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T17 |
22 |
|
T30 |
8 |
|
T105 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T17 |
16 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T17 |
13 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T17 |
22 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T17 |
15 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59811 |
1 |
|
|
T17 |
1546 |
|
T30 |
1120 |
|
T105 |
1014 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43109 |
1 |
|
|
T17 |
597 |
|
T30 |
114 |
|
T105 |
234 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61952 |
1 |
|
|
T17 |
642 |
|
T30 |
299 |
|
T105 |
269 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48007 |
1 |
|
|
T17 |
517 |
|
T30 |
172 |
|
T105 |
218 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T17 |
16 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1723 |
1 |
|
|
T17 |
21 |
|
T30 |
10 |
|
T105 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T17 |
14 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1735 |
1 |
|
|
T17 |
23 |
|
T30 |
10 |
|
T105 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T17 |
16 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1689 |
1 |
|
|
T17 |
21 |
|
T30 |
10 |
|
T105 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T17 |
14 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1700 |
1 |
|
|
T17 |
22 |
|
T30 |
10 |
|
T105 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T17 |
16 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1653 |
1 |
|
|
T17 |
21 |
|
T30 |
9 |
|
T105 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T17 |
14 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T17 |
21 |
|
T30 |
10 |
|
T105 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T17 |
16 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T17 |
19 |
|
T30 |
8 |
|
T105 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T17 |
14 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T17 |
21 |
|
T30 |
10 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T17 |
16 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T17 |
18 |
|
T30 |
7 |
|
T105 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T17 |
14 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T17 |
20 |
|
T30 |
10 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T17 |
16 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T17 |
18 |
|
T30 |
7 |
|
T105 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T17 |
14 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T17 |
20 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
16 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T17 |
18 |
|
T30 |
7 |
|
T105 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T17 |
14 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T17 |
20 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
16 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T17 |
18 |
|
T30 |
7 |
|
T105 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T17 |
14 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T17 |
20 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T17 |
16 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T17 |
18 |
|
T30 |
7 |
|
T105 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T17 |
13 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T17 |
19 |
|
T30 |
10 |
|
T105 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T17 |
16 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T17 |
18 |
|
T30 |
7 |
|
T105 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T17 |
13 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T17 |
19 |
|
T30 |
10 |
|
T105 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T17 |
16 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
13 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T17 |
19 |
|
T30 |
10 |
|
T105 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T17 |
16 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
13 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T17 |
19 |
|
T30 |
10 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T17 |
16 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
13 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T17 |
19 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T17 |
16 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T17 |
17 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
13 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T17 |
19 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T17 |
16 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T17 |
17 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
13 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T17 |
19 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58158 |
1 |
|
|
T17 |
1256 |
|
T30 |
407 |
|
T105 |
286 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44748 |
1 |
|
|
T17 |
657 |
|
T30 |
98 |
|
T105 |
143 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63880 |
1 |
|
|
T17 |
907 |
|
T30 |
1146 |
|
T105 |
221 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47954 |
1 |
|
|
T17 |
489 |
|
T30 |
139 |
|
T105 |
1039 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T17 |
9 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T17 |
28 |
|
T30 |
6 |
|
T105 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T17 |
25 |
|
T30 |
5 |
|
T105 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T17 |
9 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T17 |
28 |
|
T30 |
4 |
|
T105 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T17 |
25 |
|
T30 |
5 |
|
T105 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T17 |
9 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T17 |
27 |
|
T30 |
4 |
|
T105 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T17 |
25 |
|
T30 |
5 |
|
T105 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T17 |
9 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T17 |
27 |
|
T30 |
4 |
|
T105 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T17 |
25 |
|
T30 |
5 |
|
T105 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T17 |
9 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T17 |
27 |
|
T30 |
4 |
|
T105 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T17 |
23 |
|
T30 |
5 |
|
T105 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T17 |
9 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T17 |
27 |
|
T30 |
4 |
|
T105 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T17 |
22 |
|
T30 |
5 |
|
T105 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T17 |
9 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T17 |
26 |
|
T30 |
4 |
|
T105 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T17 |
21 |
|
T30 |
5 |
|
T105 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T17 |
9 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T17 |
26 |
|
T30 |
4 |
|
T105 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T17 |
21 |
|
T30 |
5 |
|
T105 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T17 |
9 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T17 |
25 |
|
T30 |
4 |
|
T105 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T17 |
21 |
|
T30 |
6 |
|
T105 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T17 |
9 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T17 |
24 |
|
T30 |
4 |
|
T105 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T17 |
21 |
|
T30 |
6 |
|
T105 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
9 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T17 |
24 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T17 |
18 |
|
T30 |
6 |
|
T105 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
9 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T17 |
22 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T17 |
18 |
|
T30 |
6 |
|
T105 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
9 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T17 |
22 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T17 |
18 |
|
T30 |
5 |
|
T105 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
9 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T17 |
22 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1195 |
1 |
|
|
T17 |
18 |
|
T30 |
4 |
|
T105 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
9 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1218 |
1 |
|
|
T17 |
22 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1170 |
1 |
|
|
T17 |
18 |
|
T30 |
4 |
|
T105 |
9 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57617 |
1 |
|
|
T17 |
1643 |
|
T30 |
323 |
|
T105 |
182 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48406 |
1 |
|
|
T17 |
707 |
|
T30 |
132 |
|
T105 |
278 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64646 |
1 |
|
|
T17 |
615 |
|
T30 |
1199 |
|
T105 |
318 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41964 |
1 |
|
|
T17 |
406 |
|
T30 |
130 |
|
T105 |
981 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T17 |
15 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1695 |
1 |
|
|
T17 |
19 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T17 |
12 |
|
T30 |
7 |
|
T105 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1693 |
1 |
|
|
T17 |
22 |
|
T30 |
3 |
|
T105 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T17 |
15 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T17 |
19 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T17 |
12 |
|
T30 |
7 |
|
T105 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1664 |
1 |
|
|
T17 |
21 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T17 |
15 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T17 |
19 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T17 |
12 |
|
T30 |
7 |
|
T105 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T17 |
21 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T17 |
15 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T17 |
19 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T17 |
12 |
|
T30 |
7 |
|
T105 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T17 |
21 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T17 |
15 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T17 |
18 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T17 |
12 |
|
T30 |
7 |
|
T105 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T17 |
18 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T17 |
15 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T17 |
18 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T17 |
12 |
|
T30 |
7 |
|
T105 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T17 |
18 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T17 |
15 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T17 |
18 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T17 |
12 |
|
T30 |
7 |
|
T105 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T17 |
18 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T17 |
15 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T17 |
18 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T17 |
12 |
|
T30 |
7 |
|
T105 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T17 |
18 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T17 |
15 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T17 |
18 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T105 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T17 |
18 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T17 |
15 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T17 |
18 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T105 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T17 |
17 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T17 |
15 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T17 |
18 |
|
T30 |
3 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T105 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T17 |
17 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T17 |
15 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T17 |
18 |
|
T30 |
3 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T105 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T17 |
17 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T17 |
15 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T17 |
18 |
|
T30 |
3 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T105 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T17 |
17 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T17 |
15 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T17 |
18 |
|
T30 |
3 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T105 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T17 |
17 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T17 |
15 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T17 |
18 |
|
T30 |
3 |
|
T105 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T105 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T17 |
17 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55815 |
1 |
|
|
T17 |
539 |
|
T30 |
308 |
|
T105 |
119 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48793 |
1 |
|
|
T17 |
514 |
|
T30 |
1107 |
|
T105 |
383 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62144 |
1 |
|
|
T17 |
1047 |
|
T30 |
133 |
|
T105 |
1038 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47805 |
1 |
|
|
T17 |
1183 |
|
T30 |
188 |
|
T105 |
142 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T17 |
10 |
|
T30 |
1 |
|
T105 |
3 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T17 |
28 |
|
T30 |
10 |
|
T105 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1673 |
1 |
|
|
T17 |
27 |
|
T30 |
8 |
|
T105 |
13 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T17 |
10 |
|
T30 |
1 |
|
T105 |
3 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T17 |
27 |
|
T30 |
10 |
|
T105 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T17 |
26 |
|
T30 |
8 |
|
T105 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T17 |
10 |
|
T30 |
1 |
|
T105 |
3 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T17 |
26 |
|
T30 |
10 |
|
T105 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T17 |
26 |
|
T30 |
8 |
|
T105 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T17 |
10 |
|
T30 |
1 |
|
T105 |
3 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T17 |
26 |
|
T30 |
10 |
|
T105 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T17 |
26 |
|
T30 |
8 |
|
T105 |
12 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
10 |
|
T30 |
1 |
|
T105 |
3 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T17 |
26 |
|
T30 |
10 |
|
T105 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T17 |
25 |
|
T30 |
8 |
|
T105 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
10 |
|
T30 |
1 |
|
T105 |
3 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T17 |
24 |
|
T30 |
10 |
|
T105 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T17 |
24 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T17 |
10 |
|
T30 |
1 |
|
T105 |
3 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T17 |
24 |
|
T30 |
10 |
|
T105 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T17 |
24 |
|
T30 |
8 |
|
T105 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T17 |
10 |
|
T30 |
1 |
|
T105 |
3 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T17 |
22 |
|
T30 |
10 |
|
T105 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T17 |
24 |
|
T30 |
8 |
|
T105 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T17 |
10 |
|
T30 |
1 |
|
T105 |
3 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T17 |
21 |
|
T30 |
10 |
|
T105 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T17 |
24 |
|
T30 |
9 |
|
T105 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T17 |
10 |
|
T30 |
1 |
|
T105 |
3 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T17 |
21 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T17 |
24 |
|
T30 |
9 |
|
T105 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T17 |
10 |
|
T30 |
1 |
|
T105 |
3 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T17 |
21 |
|
T30 |
7 |
|
T105 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T17 |
24 |
|
T30 |
9 |
|
T105 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T17 |
10 |
|
T30 |
1 |
|
T105 |
3 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T17 |
19 |
|
T30 |
6 |
|
T105 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T17 |
24 |
|
T30 |
9 |
|
T105 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T17 |
10 |
|
T30 |
1 |
|
T105 |
3 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T17 |
18 |
|
T30 |
6 |
|
T105 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T17 |
24 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T17 |
10 |
|
T30 |
1 |
|
T105 |
3 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T17 |
18 |
|
T30 |
6 |
|
T105 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T17 |
23 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T17 |
10 |
|
T30 |
1 |
|
T105 |
3 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1199 |
1 |
|
|
T17 |
18 |
|
T30 |
6 |
|
T105 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T17 |
23 |
|
T30 |
8 |
|
T105 |
8 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57354 |
1 |
|
|
T17 |
897 |
|
T30 |
164 |
|
T105 |
220 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47059 |
1 |
|
|
T17 |
700 |
|
T30 |
171 |
|
T105 |
135 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64865 |
1 |
|
|
T17 |
785 |
|
T30 |
1052 |
|
T105 |
246 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44437 |
1 |
|
|
T17 |
1039 |
|
T30 |
256 |
|
T105 |
1105 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T17 |
21 |
|
T30 |
9 |
|
T105 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T17 |
21 |
|
T30 |
11 |
|
T105 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1627 |
1 |
|
|
T17 |
21 |
|
T30 |
9 |
|
T105 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1593 |
1 |
|
|
T17 |
20 |
|
T30 |
10 |
|
T105 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T17 |
21 |
|
T30 |
9 |
|
T105 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T17 |
20 |
|
T30 |
10 |
|
T105 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T17 |
21 |
|
T30 |
9 |
|
T105 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T17 |
20 |
|
T30 |
10 |
|
T105 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T17 |
21 |
|
T30 |
9 |
|
T105 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T17 |
20 |
|
T30 |
10 |
|
T105 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T17 |
21 |
|
T30 |
9 |
|
T105 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T17 |
20 |
|
T30 |
10 |
|
T105 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T17 |
19 |
|
T30 |
9 |
|
T105 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T17 |
17 |
|
T30 |
10 |
|
T105 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T17 |
19 |
|
T30 |
9 |
|
T105 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T17 |
17 |
|
T30 |
9 |
|
T105 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T17 |
19 |
|
T30 |
9 |
|
T105 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T17 |
17 |
|
T30 |
10 |
|
T105 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T17 |
19 |
|
T30 |
9 |
|
T105 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T17 |
17 |
|
T30 |
10 |
|
T105 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T17 |
19 |
|
T30 |
8 |
|
T105 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T17 |
17 |
|
T30 |
10 |
|
T105 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T17 |
19 |
|
T30 |
8 |
|
T105 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T17 |
16 |
|
T30 |
9 |
|
T105 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T17 |
16 |
|
T30 |
9 |
|
T105 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1245 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T17 |
16 |
|
T30 |
8 |
|
T105 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1198 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T17 |
16 |
|
T30 |
8 |
|
T105 |
9 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55922 |
1 |
|
|
T17 |
1097 |
|
T30 |
104 |
|
T105 |
172 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44708 |
1 |
|
|
T17 |
794 |
|
T30 |
1167 |
|
T105 |
160 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59398 |
1 |
|
|
T17 |
710 |
|
T30 |
178 |
|
T105 |
252 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52864 |
1 |
|
|
T17 |
519 |
|
T30 |
211 |
|
T105 |
1066 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1732 |
1 |
|
|
T17 |
37 |
|
T30 |
12 |
|
T105 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1725 |
1 |
|
|
T17 |
37 |
|
T30 |
12 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1704 |
1 |
|
|
T17 |
36 |
|
T30 |
12 |
|
T105 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1700 |
1 |
|
|
T17 |
35 |
|
T30 |
12 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T17 |
35 |
|
T30 |
12 |
|
T105 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T17 |
33 |
|
T30 |
12 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1640 |
1 |
|
|
T17 |
34 |
|
T30 |
12 |
|
T105 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1624 |
1 |
|
|
T17 |
32 |
|
T30 |
12 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T17 |
34 |
|
T30 |
12 |
|
T105 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T17 |
30 |
|
T30 |
12 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T17 |
34 |
|
T30 |
11 |
|
T105 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T17 |
30 |
|
T30 |
12 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T17 |
32 |
|
T30 |
10 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T17 |
30 |
|
T30 |
12 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T17 |
32 |
|
T30 |
10 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T17 |
29 |
|
T30 |
12 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T17 |
30 |
|
T30 |
10 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T17 |
28 |
|
T30 |
11 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T17 |
29 |
|
T30 |
10 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T17 |
27 |
|
T30 |
11 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T17 |
29 |
|
T30 |
10 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T17 |
25 |
|
T30 |
10 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T17 |
29 |
|
T30 |
9 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T17 |
22 |
|
T30 |
10 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T17 |
29 |
|
T30 |
9 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T17 |
22 |
|
T30 |
9 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T17 |
28 |
|
T30 |
9 |
|
T105 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T17 |
22 |
|
T30 |
9 |
|
T105 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T17 |
28 |
|
T30 |
9 |
|
T105 |
8 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T17 |
22 |
|
T30 |
9 |
|
T105 |
8 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60024 |
1 |
|
|
T17 |
494 |
|
T30 |
279 |
|
T105 |
299 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50051 |
1 |
|
|
T17 |
643 |
|
T30 |
1195 |
|
T105 |
183 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54429 |
1 |
|
|
T17 |
1276 |
|
T30 |
106 |
|
T105 |
185 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47733 |
1 |
|
|
T17 |
848 |
|
T30 |
112 |
|
T105 |
961 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1798 |
1 |
|
|
T17 |
30 |
|
T30 |
11 |
|
T105 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1771 |
1 |
|
|
T17 |
31 |
|
T30 |
12 |
|
T105 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1760 |
1 |
|
|
T17 |
30 |
|
T30 |
11 |
|
T105 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1740 |
1 |
|
|
T17 |
30 |
|
T30 |
11 |
|
T105 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1723 |
1 |
|
|
T17 |
30 |
|
T30 |
11 |
|
T105 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1705 |
1 |
|
|
T17 |
29 |
|
T30 |
10 |
|
T105 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1684 |
1 |
|
|
T17 |
28 |
|
T30 |
10 |
|
T105 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T17 |
29 |
|
T30 |
10 |
|
T105 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T17 |
27 |
|
T30 |
10 |
|
T105 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T17 |
28 |
|
T30 |
10 |
|
T105 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T17 |
26 |
|
T30 |
10 |
|
T105 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T17 |
26 |
|
T30 |
9 |
|
T105 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T17 |
25 |
|
T30 |
10 |
|
T105 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T17 |
26 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T17 |
24 |
|
T30 |
10 |
|
T105 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T17 |
26 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T17 |
24 |
|
T30 |
10 |
|
T105 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T17 |
26 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T17 |
23 |
|
T30 |
10 |
|
T105 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T17 |
26 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T17 |
20 |
|
T30 |
10 |
|
T105 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T17 |
26 |
|
T30 |
7 |
|
T105 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T17 |
17 |
|
T30 |
10 |
|
T105 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T17 |
10 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T17 |
26 |
|
T30 |
7 |
|
T105 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T17 |
17 |
|
T30 |
10 |
|
T105 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
10 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T17 |
25 |
|
T30 |
6 |
|
T105 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T17 |
17 |
|
T30 |
10 |
|
T105 |
9 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
10 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T17 |
25 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T17 |
17 |
|
T30 |
10 |
|
T105 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T17 |
10 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T17 |
25 |
|
T30 |
5 |
|
T105 |
7 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58376 |
1 |
|
|
T17 |
731 |
|
T30 |
161 |
|
T105 |
324 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49759 |
1 |
|
|
T17 |
1108 |
|
T30 |
235 |
|
T105 |
175 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54895 |
1 |
|
|
T17 |
692 |
|
T30 |
969 |
|
T105 |
209 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48451 |
1 |
|
|
T17 |
669 |
|
T30 |
253 |
|
T105 |
926 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T17 |
11 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1783 |
1 |
|
|
T17 |
30 |
|
T30 |
14 |
|
T105 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1791 |
1 |
|
|
T17 |
30 |
|
T30 |
13 |
|
T105 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T17 |
11 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1745 |
1 |
|
|
T17 |
28 |
|
T30 |
14 |
|
T105 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1759 |
1 |
|
|
T17 |
30 |
|
T30 |
13 |
|
T105 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T17 |
11 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1709 |
1 |
|
|
T17 |
28 |
|
T30 |
13 |
|
T105 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1726 |
1 |
|
|
T17 |
30 |
|
T30 |
13 |
|
T105 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T17 |
11 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1678 |
1 |
|
|
T17 |
28 |
|
T30 |
13 |
|
T105 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1688 |
1 |
|
|
T17 |
30 |
|
T30 |
13 |
|
T105 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T17 |
11 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T17 |
27 |
|
T30 |
13 |
|
T105 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1654 |
1 |
|
|
T17 |
30 |
|
T30 |
12 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T17 |
11 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T17 |
26 |
|
T30 |
13 |
|
T105 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T17 |
30 |
|
T30 |
11 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T17 |
11 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1590 |
1 |
|
|
T17 |
26 |
|
T30 |
13 |
|
T105 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1586 |
1 |
|
|
T17 |
29 |
|
T30 |
11 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T17 |
11 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T17 |
25 |
|
T30 |
13 |
|
T105 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T17 |
29 |
|
T30 |
11 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T17 |
11 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T17 |
24 |
|
T30 |
13 |
|
T105 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
11 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T17 |
29 |
|
T30 |
12 |
|
T105 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T17 |
11 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T17 |
22 |
|
T30 |
13 |
|
T105 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
11 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T17 |
28 |
|
T30 |
11 |
|
T105 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
11 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T17 |
22 |
|
T30 |
13 |
|
T105 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T17 |
11 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T17 |
28 |
|
T30 |
11 |
|
T105 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
11 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T17 |
21 |
|
T30 |
13 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T17 |
11 |
|
T30 |
2 |
|
T105 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T17 |
27 |
|
T30 |
11 |
|
T105 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
11 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T17 |
20 |
|
T30 |
13 |
|
T105 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T17 |
11 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T17 |
27 |
|
T30 |
11 |
|
T105 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
11 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T17 |
19 |
|
T30 |
13 |
|
T105 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T17 |
11 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T17 |
25 |
|
T30 |
11 |
|
T105 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
11 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T17 |
17 |
|
T30 |
13 |
|
T105 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T17 |
11 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T17 |
25 |
|
T30 |
10 |
|
T105 |
8 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57856 |
1 |
|
|
T17 |
1492 |
|
T30 |
1351 |
|
T105 |
1138 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47584 |
1 |
|
|
T17 |
560 |
|
T30 |
68 |
|
T105 |
127 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64262 |
1 |
|
|
T17 |
823 |
|
T30 |
280 |
|
T105 |
442 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42998 |
1 |
|
|
T17 |
489 |
|
T30 |
87 |
|
T105 |
59 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1732 |
1 |
|
|
T17 |
25 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T17 |
12 |
|
T30 |
6 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1726 |
1 |
|
|
T17 |
24 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1694 |
1 |
|
|
T17 |
25 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T17 |
12 |
|
T30 |
6 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1689 |
1 |
|
|
T17 |
24 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1662 |
1 |
|
|
T17 |
24 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T17 |
12 |
|
T30 |
6 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T17 |
24 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1635 |
1 |
|
|
T17 |
23 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T17 |
12 |
|
T30 |
6 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1611 |
1 |
|
|
T17 |
22 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T17 |
23 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T17 |
12 |
|
T30 |
6 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T17 |
22 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T17 |
23 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T17 |
12 |
|
T30 |
6 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T17 |
20 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T17 |
23 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T17 |
12 |
|
T30 |
6 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T17 |
19 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T17 |
22 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T17 |
12 |
|
T30 |
6 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T17 |
18 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T17 |
22 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T17 |
18 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T17 |
22 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T17 |
17 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T17 |
21 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T17 |
15 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T17 |
21 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T17 |
15 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T17 |
21 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T17 |
15 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T17 |
21 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T17 |
15 |
|
T30 |
2 |
|
T105 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T17 |
20 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T17 |
11 |
|
T30 |
5 |
|
T105 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T17 |
14 |
|
T30 |
2 |
|
T105 |
2 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59703 |
1 |
|
|
T17 |
641 |
|
T30 |
1194 |
|
T105 |
552 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41060 |
1 |
|
|
T17 |
798 |
|
T30 |
252 |
|
T105 |
221 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
68091 |
1 |
|
|
T17 |
1204 |
|
T30 |
205 |
|
T105 |
68 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45734 |
1 |
|
|
T17 |
574 |
|
T30 |
100 |
|
T105 |
890 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T17 |
32 |
|
T30 |
8 |
|
T105 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T17 |
9 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T17 |
32 |
|
T30 |
7 |
|
T105 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T17 |
32 |
|
T30 |
8 |
|
T105 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T17 |
9 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T17 |
32 |
|
T30 |
6 |
|
T105 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T17 |
32 |
|
T30 |
8 |
|
T105 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T17 |
9 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T17 |
32 |
|
T30 |
5 |
|
T105 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T17 |
31 |
|
T30 |
8 |
|
T105 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T17 |
9 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T17 |
32 |
|
T30 |
5 |
|
T105 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T17 |
29 |
|
T30 |
8 |
|
T105 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T17 |
9 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T17 |
31 |
|
T30 |
5 |
|
T105 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T17 |
29 |
|
T30 |
8 |
|
T105 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T17 |
9 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T17 |
31 |
|
T30 |
5 |
|
T105 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T17 |
29 |
|
T30 |
8 |
|
T105 |
7 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T17 |
9 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T17 |
31 |
|
T30 |
5 |
|
T105 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T17 |
28 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T17 |
9 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T17 |
31 |
|
T30 |
5 |
|
T105 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T17 |
28 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T17 |
29 |
|
T30 |
6 |
|
T105 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T17 |
28 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T17 |
27 |
|
T30 |
5 |
|
T105 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T17 |
27 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T17 |
26 |
|
T30 |
4 |
|
T105 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T17 |
26 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
2 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T17 |
25 |
|
T30 |
4 |
|
T105 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T17 |
26 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
1 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T17 |
23 |
|
T30 |
4 |
|
T105 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T17 |
26 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
1 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T17 |
23 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T17 |
26 |
|
T30 |
8 |
|
T105 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T17 |
8 |
|
T30 |
3 |
|
T105 |
1 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1176 |
1 |
|
|
T17 |
21 |
|
T30 |
3 |
|
T105 |
8 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55722 |
1 |
|
|
T17 |
1406 |
|
T30 |
284 |
|
T105 |
92 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46638 |
1 |
|
|
T17 |
457 |
|
T30 |
1015 |
|
T105 |
1100 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64426 |
1 |
|
|
T17 |
899 |
|
T30 |
326 |
|
T105 |
162 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46604 |
1 |
|
|
T17 |
665 |
|
T30 |
98 |
|
T105 |
281 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T53 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1725 |
1 |
|
|
T17 |
21 |
|
T30 |
6 |
|
T105 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T17 |
10 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1692 |
1 |
|
|
T17 |
22 |
|
T30 |
6 |
|
T105 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T53 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1684 |
1 |
|
|
T17 |
21 |
|
T30 |
6 |
|
T105 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T17 |
10 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1668 |
1 |
|
|
T17 |
22 |
|
T30 |
6 |
|
T105 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T53 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T17 |
21 |
|
T30 |
5 |
|
T105 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T17 |
10 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1644 |
1 |
|
|
T17 |
22 |
|
T30 |
6 |
|
T105 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T53 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T17 |
20 |
|
T30 |
5 |
|
T105 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T17 |
10 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T17 |
22 |
|
T30 |
6 |
|
T105 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T53 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T17 |
19 |
|
T30 |
5 |
|
T105 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T17 |
10 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T17 |
22 |
|
T30 |
5 |
|
T105 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T53 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T17 |
19 |
|
T30 |
4 |
|
T105 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T17 |
10 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T17 |
22 |
|
T30 |
5 |
|
T105 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T53 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T17 |
16 |
|
T30 |
4 |
|
T105 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T17 |
10 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T17 |
22 |
|
T30 |
5 |
|
T105 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T53 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T17 |
16 |
|
T30 |
4 |
|
T105 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T17 |
10 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T17 |
22 |
|
T30 |
5 |
|
T105 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T53 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T17 |
16 |
|
T30 |
4 |
|
T105 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T17 |
9 |
|
T30 |
6 |
|
T105 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T17 |
22 |
|
T30 |
5 |
|
T105 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T53 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T17 |
16 |
|
T30 |
4 |
|
T105 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T17 |
9 |
|
T30 |
6 |
|
T105 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T17 |
22 |
|
T30 |
5 |
|
T105 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T53 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T17 |
15 |
|
T30 |
3 |
|
T105 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T17 |
9 |
|
T30 |
6 |
|
T105 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T17 |
22 |
|
T30 |
5 |
|
T105 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T53 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T17 |
14 |
|
T30 |
3 |
|
T105 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T17 |
9 |
|
T30 |
6 |
|
T105 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T17 |
22 |
|
T30 |
5 |
|
T105 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T53 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T17 |
14 |
|
T30 |
3 |
|
T105 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T17 |
9 |
|
T30 |
6 |
|
T105 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T17 |
22 |
|
T30 |
5 |
|
T105 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T53 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T17 |
14 |
|
T30 |
2 |
|
T105 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T17 |
9 |
|
T30 |
6 |
|
T105 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T17 |
22 |
|
T30 |
5 |
|
T105 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T17 |
11 |
|
T30 |
6 |
|
T53 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T17 |
13 |
|
T30 |
2 |
|
T105 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T17 |
9 |
|
T30 |
6 |
|
T105 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T17 |
22 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57870 |
1 |
|
|
T17 |
878 |
|
T30 |
1171 |
|
T105 |
299 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47363 |
1 |
|
|
T17 |
767 |
|
T30 |
145 |
|
T105 |
865 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58836 |
1 |
|
|
T17 |
1181 |
|
T30 |
357 |
|
T105 |
193 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49218 |
1 |
|
|
T17 |
437 |
|
T30 |
52 |
|
T105 |
320 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1710 |
1 |
|
|
T17 |
26 |
|
T30 |
8 |
|
T105 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1730 |
1 |
|
|
T17 |
22 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1672 |
1 |
|
|
T17 |
26 |
|
T30 |
8 |
|
T105 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1693 |
1 |
|
|
T17 |
21 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T17 |
26 |
|
T30 |
8 |
|
T105 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T17 |
20 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T17 |
25 |
|
T30 |
8 |
|
T105 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T17 |
20 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T17 |
24 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T17 |
19 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T17 |
24 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T17 |
18 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T17 |
24 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T17 |
18 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T17 |
24 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T17 |
18 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T17 |
24 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T17 |
16 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T17 |
16 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T17 |
24 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T17 |
16 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T17 |
16 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T17 |
24 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T17 |
16 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T17 |
16 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T17 |
24 |
|
T30 |
8 |
|
T105 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T17 |
16 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T17 |
16 |
|
T30 |
3 |
|
T105 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T17 |
24 |
|
T30 |
8 |
|
T105 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T17 |
16 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T17 |
14 |
|
T30 |
2 |
|
T105 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T17 |
24 |
|
T30 |
8 |
|
T105 |
4 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T17 |
16 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T17 |
14 |
|
T30 |
2 |
|
T105 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T17 |
12 |
|
T30 |
3 |
|
T105 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T17 |
24 |
|
T30 |
8 |
|
T105 |
4 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T17 |
16 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T17 |
14 |
|
T30 |
2 |
|
T105 |
8 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58516 |
1 |
|
|
T17 |
917 |
|
T30 |
231 |
|
T105 |
176 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42887 |
1 |
|
|
T17 |
533 |
|
T30 |
102 |
|
T105 |
374 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63044 |
1 |
|
|
T17 |
932 |
|
T30 |
1259 |
|
T105 |
158 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48004 |
1 |
|
|
T17 |
980 |
|
T30 |
163 |
|
T105 |
973 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1743 |
1 |
|
|
T17 |
22 |
|
T30 |
6 |
|
T105 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1784 |
1 |
|
|
T17 |
22 |
|
T30 |
6 |
|
T105 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1705 |
1 |
|
|
T17 |
22 |
|
T30 |
5 |
|
T105 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1749 |
1 |
|
|
T17 |
22 |
|
T30 |
6 |
|
T105 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1668 |
1 |
|
|
T17 |
22 |
|
T30 |
5 |
|
T105 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1721 |
1 |
|
|
T17 |
21 |
|
T30 |
6 |
|
T105 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T17 |
21 |
|
T30 |
5 |
|
T105 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1690 |
1 |
|
|
T17 |
21 |
|
T30 |
6 |
|
T105 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T17 |
21 |
|
T30 |
4 |
|
T105 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T17 |
21 |
|
T30 |
6 |
|
T105 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T17 |
21 |
|
T30 |
4 |
|
T105 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T17 |
20 |
|
T30 |
6 |
|
T105 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T17 |
21 |
|
T30 |
4 |
|
T105 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T17 |
19 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T17 |
21 |
|
T30 |
4 |
|
T105 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T17 |
17 |
|
T30 |
6 |
|
T105 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T17 |
21 |
|
T30 |
4 |
|
T105 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T17 |
17 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T17 |
21 |
|
T30 |
4 |
|
T105 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T17 |
16 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T17 |
21 |
|
T30 |
4 |
|
T105 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T17 |
16 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T17 |
20 |
|
T30 |
4 |
|
T105 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T17 |
15 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T17 |
20 |
|
T30 |
4 |
|
T105 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T17 |
14 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T17 |
20 |
|
T30 |
4 |
|
T105 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T17 |
14 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T17 |
20 |
|
T30 |
4 |
|
T105 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T17 |
14 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57211 |
1 |
|
|
T17 |
993 |
|
T30 |
65 |
|
T105 |
145 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47360 |
1 |
|
|
T17 |
991 |
|
T30 |
137 |
|
T105 |
179 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60870 |
1 |
|
|
T17 |
853 |
|
T30 |
328 |
|
T105 |
990 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48741 |
1 |
|
|
T17 |
516 |
|
T30 |
1228 |
|
T105 |
315 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
16 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1683 |
1 |
|
|
T17 |
18 |
|
T30 |
9 |
|
T105 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T17 |
14 |
|
T30 |
1 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1703 |
1 |
|
|
T17 |
20 |
|
T30 |
10 |
|
T105 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T17 |
16 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T17 |
18 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T17 |
14 |
|
T30 |
1 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1664 |
1 |
|
|
T17 |
19 |
|
T30 |
10 |
|
T105 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T17 |
16 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T17 |
18 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T17 |
14 |
|
T30 |
1 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T17 |
19 |
|
T30 |
10 |
|
T105 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T17 |
16 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T17 |
17 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T17 |
14 |
|
T30 |
1 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T17 |
19 |
|
T30 |
10 |
|
T105 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T17 |
16 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T17 |
17 |
|
T30 |
8 |
|
T105 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T17 |
14 |
|
T30 |
1 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T17 |
19 |
|
T30 |
10 |
|
T105 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T17 |
16 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T17 |
17 |
|
T30 |
8 |
|
T105 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T17 |
14 |
|
T30 |
1 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T17 |
19 |
|
T30 |
10 |
|
T105 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T17 |
16 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T17 |
14 |
|
T30 |
1 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T17 |
19 |
|
T30 |
10 |
|
T105 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T17 |
16 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T17 |
14 |
|
T30 |
1 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T17 |
19 |
|
T30 |
10 |
|
T105 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T17 |
16 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T17 |
17 |
|
T30 |
7 |
|
T105 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T17 |
13 |
|
T30 |
1 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T17 |
19 |
|
T30 |
10 |
|
T105 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T17 |
16 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T17 |
16 |
|
T30 |
7 |
|
T105 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T17 |
13 |
|
T30 |
1 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T17 |
19 |
|
T30 |
10 |
|
T105 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T17 |
16 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T17 |
16 |
|
T30 |
7 |
|
T105 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T17 |
13 |
|
T30 |
1 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T17 |
17 |
|
T30 |
10 |
|
T105 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T17 |
16 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T17 |
16 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T17 |
13 |
|
T30 |
1 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T17 |
17 |
|
T30 |
9 |
|
T105 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T17 |
16 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T17 |
16 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T17 |
13 |
|
T30 |
1 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T17 |
17 |
|
T30 |
9 |
|
T105 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T17 |
16 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T17 |
15 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T17 |
13 |
|
T30 |
1 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T17 |
17 |
|
T30 |
9 |
|
T105 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T17 |
16 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T17 |
15 |
|
T30 |
6 |
|
T105 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T17 |
13 |
|
T30 |
1 |
|
T105 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T17 |
15 |
|
T30 |
9 |
|
T105 |
10 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57448 |
1 |
|
|
T17 |
618 |
|
T30 |
1301 |
|
T105 |
251 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44642 |
1 |
|
|
T17 |
808 |
|
T30 |
77 |
|
T105 |
198 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60844 |
1 |
|
|
T17 |
557 |
|
T30 |
288 |
|
T105 |
258 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49828 |
1 |
|
|
T17 |
1167 |
|
T30 |
124 |
|
T105 |
914 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T17 |
5 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1707 |
1 |
|
|
T17 |
40 |
|
T30 |
5 |
|
T105 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T17 |
8 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1706 |
1 |
|
|
T17 |
38 |
|
T30 |
3 |
|
T105 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T17 |
5 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1675 |
1 |
|
|
T17 |
40 |
|
T30 |
5 |
|
T105 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T17 |
8 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1665 |
1 |
|
|
T17 |
35 |
|
T30 |
3 |
|
T105 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T17 |
5 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1644 |
1 |
|
|
T17 |
39 |
|
T30 |
4 |
|
T105 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T17 |
8 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1639 |
1 |
|
|
T17 |
33 |
|
T30 |
3 |
|
T105 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T17 |
5 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T17 |
38 |
|
T30 |
4 |
|
T105 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T17 |
8 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T17 |
33 |
|
T30 |
3 |
|
T105 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T17 |
5 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T17 |
38 |
|
T30 |
4 |
|
T105 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T17 |
8 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T17 |
30 |
|
T30 |
3 |
|
T105 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T17 |
5 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T17 |
38 |
|
T30 |
4 |
|
T105 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T17 |
8 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T17 |
29 |
|
T30 |
3 |
|
T105 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T17 |
5 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T17 |
38 |
|
T30 |
4 |
|
T105 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T17 |
8 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T17 |
28 |
|
T30 |
3 |
|
T105 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T17 |
5 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T17 |
38 |
|
T30 |
4 |
|
T105 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T17 |
8 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T17 |
27 |
|
T30 |
3 |
|
T105 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T17 |
5 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T17 |
38 |
|
T30 |
4 |
|
T105 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T17 |
8 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T17 |
26 |
|
T30 |
3 |
|
T105 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T17 |
5 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T17 |
37 |
|
T30 |
4 |
|
T105 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T17 |
8 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T17 |
25 |
|
T30 |
3 |
|
T105 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T17 |
5 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T17 |
36 |
|
T30 |
3 |
|
T105 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T17 |
8 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T17 |
24 |
|
T30 |
3 |
|
T105 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T17 |
5 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T17 |
36 |
|
T30 |
3 |
|
T105 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T17 |
8 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T17 |
24 |
|
T30 |
3 |
|
T105 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T17 |
5 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T17 |
35 |
|
T30 |
3 |
|
T105 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T17 |
8 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T17 |
22 |
|
T30 |
3 |
|
T105 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T17 |
5 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T17 |
34 |
|
T30 |
3 |
|
T105 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T17 |
8 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T17 |
22 |
|
T30 |
3 |
|
T105 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T17 |
5 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T17 |
34 |
|
T30 |
3 |
|
T105 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T17 |
8 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T17 |
20 |
|
T30 |
3 |
|
T105 |
10 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57984 |
1 |
|
|
T17 |
556 |
|
T30 |
188 |
|
T105 |
277 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46537 |
1 |
|
|
T17 |
703 |
|
T30 |
181 |
|
T105 |
149 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55511 |
1 |
|
|
T17 |
705 |
|
T30 |
1166 |
|
T105 |
1189 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51887 |
1 |
|
|
T17 |
1201 |
|
T30 |
172 |
|
T105 |
141 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1768 |
1 |
|
|
T17 |
31 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T17 |
12 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1800 |
1 |
|
|
T17 |
32 |
|
T30 |
7 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1736 |
1 |
|
|
T17 |
30 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T17 |
12 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1771 |
1 |
|
|
T17 |
30 |
|
T30 |
7 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1711 |
1 |
|
|
T17 |
30 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T17 |
12 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1737 |
1 |
|
|
T17 |
28 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T17 |
30 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T17 |
12 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1709 |
1 |
|
|
T17 |
28 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T17 |
30 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T17 |
12 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T17 |
28 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T17 |
29 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T17 |
12 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T17 |
28 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T17 |
27 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T17 |
12 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T17 |
27 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T17 |
25 |
|
T30 |
8 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T17 |
12 |
|
T30 |
6 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T17 |
27 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T17 |
24 |
|
T30 |
7 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T17 |
27 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T17 |
23 |
|
T30 |
7 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T17 |
27 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T17 |
23 |
|
T30 |
7 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T17 |
27 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T17 |
23 |
|
T30 |
7 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T17 |
26 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T17 |
20 |
|
T30 |
7 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T17 |
26 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T17 |
19 |
|
T30 |
7 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T17 |
26 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T17 |
19 |
|
T30 |
7 |
|
T105 |
6 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T17 |
25 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61257 |
1 |
|
|
T17 |
687 |
|
T30 |
98 |
|
T105 |
263 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43940 |
1 |
|
|
T17 |
710 |
|
T30 |
269 |
|
T105 |
952 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61141 |
1 |
|
|
T17 |
1343 |
|
T30 |
150 |
|
T105 |
309 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47451 |
1 |
|
|
T17 |
426 |
|
T30 |
1178 |
|
T105 |
144 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T17 |
31 |
|
T30 |
10 |
|
T105 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T17 |
14 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1664 |
1 |
|
|
T17 |
30 |
|
T30 |
8 |
|
T105 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T17 |
31 |
|
T30 |
10 |
|
T105 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T17 |
14 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T17 |
29 |
|
T30 |
8 |
|
T105 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T17 |
30 |
|
T30 |
10 |
|
T105 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T17 |
14 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T17 |
28 |
|
T30 |
8 |
|
T105 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T17 |
30 |
|
T30 |
9 |
|
T105 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T17 |
14 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T17 |
27 |
|
T30 |
8 |
|
T105 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T17 |
29 |
|
T30 |
9 |
|
T105 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T17 |
14 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T17 |
26 |
|
T30 |
8 |
|
T105 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T17 |
29 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T17 |
14 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T17 |
25 |
|
T30 |
8 |
|
T105 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T17 |
29 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T17 |
14 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T17 |
24 |
|
T30 |
8 |
|
T105 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T17 |
29 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T17 |
14 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T17 |
22 |
|
T30 |
8 |
|
T105 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T17 |
29 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T17 |
21 |
|
T30 |
9 |
|
T105 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T17 |
29 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T17 |
21 |
|
T30 |
9 |
|
T105 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T17 |
29 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T17 |
20 |
|
T30 |
9 |
|
T105 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T17 |
29 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T17 |
19 |
|
T30 |
9 |
|
T105 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T17 |
27 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T17 |
16 |
|
T30 |
7 |
|
T105 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T17 |
27 |
|
T30 |
8 |
|
T105 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T17 |
16 |
|
T30 |
7 |
|
T105 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T17 |
12 |
|
T30 |
2 |
|
T105 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T17 |
26 |
|
T30 |
8 |
|
T105 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T17 |
13 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1212 |
1 |
|
|
T17 |
13 |
|
T30 |
7 |
|
T105 |
5 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60251 |
1 |
|
|
T17 |
1078 |
|
T30 |
1061 |
|
T105 |
367 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46012 |
1 |
|
|
T17 |
517 |
|
T30 |
194 |
|
T105 |
170 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57795 |
1 |
|
|
T17 |
401 |
|
T30 |
127 |
|
T105 |
332 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48565 |
1 |
|
|
T17 |
1320 |
|
T30 |
262 |
|
T105 |
920 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T17 |
9 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1728 |
1 |
|
|
T17 |
29 |
|
T30 |
12 |
|
T105 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1750 |
1 |
|
|
T17 |
28 |
|
T30 |
11 |
|
T105 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T17 |
9 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T17 |
28 |
|
T30 |
12 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1719 |
1 |
|
|
T17 |
28 |
|
T30 |
11 |
|
T105 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T17 |
9 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T17 |
28 |
|
T30 |
12 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1679 |
1 |
|
|
T17 |
26 |
|
T30 |
11 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T17 |
9 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T17 |
27 |
|
T30 |
12 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T17 |
25 |
|
T30 |
11 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T17 |
9 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T17 |
27 |
|
T30 |
12 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T17 |
24 |
|
T30 |
11 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T17 |
9 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T17 |
25 |
|
T30 |
12 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T17 |
24 |
|
T30 |
11 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T17 |
9 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T17 |
23 |
|
T30 |
12 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T17 |
24 |
|
T30 |
11 |
|
T105 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T17 |
9 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T17 |
22 |
|
T30 |
12 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
11 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T17 |
23 |
|
T30 |
11 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T17 |
9 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T17 |
22 |
|
T30 |
12 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T17 |
23 |
|
T30 |
11 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T17 |
9 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T17 |
21 |
|
T30 |
12 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T17 |
23 |
|
T30 |
11 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T17 |
9 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T17 |
20 |
|
T30 |
11 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T17 |
23 |
|
T30 |
11 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T17 |
9 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T17 |
19 |
|
T30 |
10 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T17 |
23 |
|
T30 |
10 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T17 |
9 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T17 |
19 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T17 |
23 |
|
T30 |
10 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T17 |
9 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T17 |
19 |
|
T30 |
7 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T17 |
23 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T17 |
9 |
|
T30 |
2 |
|
T105 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T17 |
19 |
|
T30 |
7 |
|
T105 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T17 |
10 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T17 |
23 |
|
T30 |
9 |
|
T105 |
5 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60461 |
1 |
|
|
T17 |
821 |
|
T30 |
181 |
|
T105 |
301 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47333 |
1 |
|
|
T17 |
1289 |
|
T30 |
189 |
|
T105 |
94 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61506 |
1 |
|
|
T17 |
681 |
|
T30 |
227 |
|
T105 |
1354 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45733 |
1 |
|
|
T17 |
570 |
|
T30 |
1134 |
|
T105 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T17 |
29 |
|
T30 |
7 |
|
T105 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T17 |
7 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1690 |
1 |
|
|
T17 |
29 |
|
T30 |
7 |
|
T105 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T17 |
29 |
|
T30 |
7 |
|
T105 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T17 |
7 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1648 |
1 |
|
|
T17 |
28 |
|
T30 |
7 |
|
T105 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T17 |
28 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T17 |
7 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T17 |
28 |
|
T30 |
7 |
|
T105 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T17 |
28 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T17 |
7 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T17 |
27 |
|
T30 |
7 |
|
T105 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T17 |
26 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T17 |
7 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T17 |
27 |
|
T30 |
6 |
|
T105 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T17 |
26 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T17 |
7 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T17 |
26 |
|
T30 |
6 |
|
T105 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T17 |
25 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T17 |
7 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T17 |
26 |
|
T30 |
6 |
|
T105 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T17 |
25 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T17 |
7 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T17 |
26 |
|
T30 |
6 |
|
T105 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T17 |
25 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T17 |
26 |
|
T30 |
7 |
|
T105 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T17 |
23 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T17 |
24 |
|
T30 |
7 |
|
T105 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T17 |
22 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T17 |
22 |
|
T30 |
7 |
|
T105 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T17 |
22 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T17 |
22 |
|
T30 |
7 |
|
T105 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T17 |
22 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T17 |
22 |
|
T30 |
6 |
|
T105 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T17 |
22 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T17 |
21 |
|
T30 |
4 |
|
T105 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T17 |
22 |
|
T30 |
5 |
|
T105 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T17 |
7 |
|
T30 |
4 |
|
T105 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T17 |
21 |
|
T30 |
4 |
|
T105 |
1 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59345 |
1 |
|
|
T17 |
764 |
|
T30 |
222 |
|
T105 |
102 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
53971 |
1 |
|
|
T17 |
1096 |
|
T30 |
1124 |
|
T105 |
385 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54320 |
1 |
|
|
T17 |
680 |
|
T30 |
304 |
|
T105 |
883 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44627 |
1 |
|
|
T17 |
677 |
|
T30 |
83 |
|
T105 |
213 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1760 |
1 |
|
|
T17 |
28 |
|
T30 |
7 |
|
T105 |
16 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T17 |
13 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1772 |
1 |
|
|
T17 |
27 |
|
T30 |
5 |
|
T105 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1720 |
1 |
|
|
T17 |
28 |
|
T30 |
6 |
|
T105 |
16 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T17 |
13 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1743 |
1 |
|
|
T17 |
27 |
|
T30 |
5 |
|
T105 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1698 |
1 |
|
|
T17 |
28 |
|
T30 |
6 |
|
T105 |
16 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T17 |
13 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1710 |
1 |
|
|
T17 |
27 |
|
T30 |
5 |
|
T105 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T17 |
28 |
|
T30 |
6 |
|
T105 |
16 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T17 |
13 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1686 |
1 |
|
|
T17 |
27 |
|
T30 |
5 |
|
T105 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T17 |
28 |
|
T30 |
6 |
|
T105 |
16 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T17 |
13 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T17 |
27 |
|
T30 |
5 |
|
T105 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T17 |
27 |
|
T30 |
6 |
|
T105 |
16 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T17 |
13 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T17 |
26 |
|
T30 |
5 |
|
T105 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T17 |
25 |
|
T30 |
6 |
|
T105 |
16 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T17 |
13 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T17 |
25 |
|
T30 |
5 |
|
T105 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T17 |
24 |
|
T30 |
6 |
|
T105 |
16 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T17 |
13 |
|
T30 |
6 |
|
T105 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T17 |
25 |
|
T30 |
5 |
|
T105 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T17 |
24 |
|
T30 |
6 |
|
T105 |
16 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T17 |
24 |
|
T30 |
6 |
|
T105 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T17 |
24 |
|
T30 |
6 |
|
T105 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T17 |
22 |
|
T30 |
6 |
|
T105 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T17 |
23 |
|
T30 |
6 |
|
T105 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T17 |
21 |
|
T30 |
5 |
|
T105 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T17 |
23 |
|
T30 |
6 |
|
T105 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T17 |
21 |
|
T30 |
5 |
|
T105 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T17 |
23 |
|
T30 |
6 |
|
T105 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T17 |
20 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T17 |
22 |
|
T30 |
6 |
|
T105 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T17 |
20 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T17 |
22 |
|
T30 |
6 |
|
T105 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T17 |
12 |
|
T30 |
5 |
|
T105 |
3 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T17 |
19 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62548 |
1 |
|
|
T17 |
1624 |
|
T30 |
1248 |
|
T105 |
303 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50385 |
1 |
|
|
T17 |
468 |
|
T30 |
85 |
|
T105 |
130 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55295 |
1 |
|
|
T17 |
751 |
|
T30 |
328 |
|
T105 |
314 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44032 |
1 |
|
|
T17 |
471 |
|
T30 |
111 |
|
T105 |
962 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T17 |
17 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1800 |
1 |
|
|
T17 |
19 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1797 |
1 |
|
|
T17 |
24 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T17 |
17 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1772 |
1 |
|
|
T17 |
19 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1756 |
1 |
|
|
T17 |
24 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T17 |
17 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1738 |
1 |
|
|
T17 |
19 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1722 |
1 |
|
|
T17 |
24 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T17 |
17 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1691 |
1 |
|
|
T17 |
19 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1698 |
1 |
|
|
T17 |
23 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T17 |
17 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T17 |
19 |
|
T30 |
4 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1675 |
1 |
|
|
T17 |
21 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T17 |
17 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T17 |
19 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T17 |
21 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T17 |
17 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T17 |
19 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T17 |
21 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T17 |
17 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T17 |
17 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T17 |
21 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T17 |
17 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T17 |
16 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T17 |
21 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T17 |
17 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T17 |
16 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T17 |
20 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T17 |
17 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T17 |
15 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T17 |
20 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T17 |
17 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T17 |
14 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T17 |
20 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T17 |
17 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T17 |
14 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T17 |
20 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T17 |
17 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T17 |
14 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T17 |
19 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T17 |
17 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T17 |
14 |
|
T30 |
4 |
|
T105 |
5 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T17 |
12 |
|
T30 |
4 |
|
T105 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T17 |
19 |
|
T30 |
5 |
|
T105 |
5 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57418 |
1 |
|
|
T17 |
999 |
|
T30 |
274 |
|
T105 |
329 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48079 |
1 |
|
|
T17 |
879 |
|
T30 |
140 |
|
T105 |
170 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60947 |
1 |
|
|
T17 |
1080 |
|
T30 |
319 |
|
T105 |
288 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46193 |
1 |
|
|
T17 |
396 |
|
T30 |
1034 |
|
T105 |
904 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T17 |
14 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1757 |
1 |
|
|
T17 |
21 |
|
T30 |
5 |
|
T105 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T17 |
18 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1752 |
1 |
|
|
T17 |
17 |
|
T30 |
6 |
|
T105 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T17 |
14 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1719 |
1 |
|
|
T17 |
21 |
|
T30 |
5 |
|
T105 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T17 |
18 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1708 |
1 |
|
|
T17 |
16 |
|
T30 |
6 |
|
T105 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T17 |
14 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1697 |
1 |
|
|
T17 |
20 |
|
T30 |
5 |
|
T105 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T17 |
18 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1677 |
1 |
|
|
T17 |
16 |
|
T30 |
6 |
|
T105 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T17 |
14 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T17 |
20 |
|
T30 |
5 |
|
T105 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T17 |
18 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T17 |
16 |
|
T30 |
6 |
|
T105 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T17 |
14 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T17 |
19 |
|
T30 |
5 |
|
T105 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T17 |
18 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T17 |
16 |
|
T30 |
6 |
|
T105 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T17 |
14 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T17 |
18 |
|
T30 |
5 |
|
T105 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T17 |
18 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T17 |
15 |
|
T30 |
6 |
|
T105 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T17 |
14 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T17 |
18 |
|
T30 |
5 |
|
T105 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T17 |
18 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T17 |
15 |
|
T30 |
6 |
|
T105 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T17 |
14 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T17 |
16 |
|
T30 |
5 |
|
T105 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T17 |
18 |
|
T30 |
4 |
|
T105 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T17 |
15 |
|
T30 |
6 |
|
T105 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T17 |
14 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T17 |
16 |
|
T30 |
5 |
|
T105 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T17 |
18 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T17 |
15 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T17 |
14 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T17 |
16 |
|
T30 |
5 |
|
T105 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T17 |
18 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T17 |
15 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T17 |
14 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T17 |
16 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T17 |
18 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T17 |
15 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T17 |
14 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T17 |
15 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T17 |
18 |
|
T30 |
3 |
|
T105 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T17 |
14 |
|
T30 |
6 |
|
T105 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T17 |
14 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T17 |
15 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
18 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T17 |
14 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T17 |
14 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T17 |
15 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
18 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T17 |
14 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T17 |
14 |
|
T30 |
4 |
|
T105 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T17 |
14 |
|
T30 |
5 |
|
T105 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
18 |
|
T30 |
3 |
|
T105 |
3 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T17 |
13 |
|
T30 |
5 |
|
T105 |
6 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58502 |
1 |
|
|
T17 |
1066 |
|
T30 |
67 |
|
T105 |
909 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49170 |
1 |
|
|
T17 |
448 |
|
T30 |
189 |
|
T105 |
189 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57529 |
1 |
|
|
T17 |
1072 |
|
T30 |
192 |
|
T105 |
316 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47828 |
1 |
|
|
T17 |
764 |
|
T30 |
1237 |
|
T105 |
250 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T17 |
20 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1691 |
1 |
|
|
T17 |
14 |
|
T30 |
12 |
|
T105 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
19 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1735 |
1 |
|
|
T17 |
16 |
|
T30 |
12 |
|
T105 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T17 |
20 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1662 |
1 |
|
|
T17 |
14 |
|
T30 |
11 |
|
T105 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T17 |
19 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1702 |
1 |
|
|
T17 |
16 |
|
T30 |
12 |
|
T105 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T17 |
20 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T17 |
14 |
|
T30 |
11 |
|
T105 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T17 |
19 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1672 |
1 |
|
|
T17 |
16 |
|
T30 |
12 |
|
T105 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T17 |
20 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T17 |
13 |
|
T30 |
11 |
|
T105 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T17 |
19 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T17 |
14 |
|
T30 |
12 |
|
T105 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T17 |
20 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1570 |
1 |
|
|
T17 |
12 |
|
T30 |
11 |
|
T105 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T17 |
19 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T17 |
14 |
|
T30 |
12 |
|
T105 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T17 |
20 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T17 |
12 |
|
T30 |
11 |
|
T105 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T17 |
19 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T17 |
14 |
|
T30 |
12 |
|
T105 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T17 |
20 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T17 |
12 |
|
T30 |
10 |
|
T105 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T17 |
19 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T17 |
13 |
|
T30 |
12 |
|
T105 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T17 |
20 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T17 |
12 |
|
T30 |
9 |
|
T105 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T17 |
19 |
|
T30 |
2 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T17 |
13 |
|
T30 |
12 |
|
T105 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T17 |
20 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T17 |
12 |
|
T30 |
9 |
|
T105 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T17 |
19 |
|
T30 |
1 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T17 |
13 |
|
T30 |
13 |
|
T105 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T17 |
20 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T17 |
11 |
|
T30 |
9 |
|
T105 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T17 |
19 |
|
T30 |
1 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T17 |
13 |
|
T30 |
12 |
|
T105 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T17 |
20 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T17 |
11 |
|
T30 |
9 |
|
T105 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T17 |
19 |
|
T30 |
1 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T17 |
13 |
|
T30 |
11 |
|
T105 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T17 |
20 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T17 |
11 |
|
T30 |
9 |
|
T105 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T17 |
19 |
|
T30 |
1 |
|
T105 |
5 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T17 |
13 |
|
T30 |
11 |
|
T105 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T17 |
20 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T17 |
11 |
|
T30 |
9 |
|
T105 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T17 |
19 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T17 |
12 |
|
T30 |
10 |
|
T105 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T17 |
20 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T17 |
11 |
|
T30 |
8 |
|
T105 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T17 |
19 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T17 |
12 |
|
T30 |
10 |
|
T105 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T17 |
20 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T17 |
11 |
|
T30 |
7 |
|
T105 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T17 |
19 |
|
T30 |
1 |
|
T105 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T17 |
12 |
|
T30 |
10 |
|
T105 |
8 |