Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
2602006 |
1 |
|
|
T23 |
51 |
|
T27 |
52 |
|
T29 |
49 |
auto[1] |
auto[0] |
auto[1] |
384204 |
1 |
|
|
T23 |
4 |
|
T27 |
5 |
|
T29 |
4 |
auto[1] |
auto[1] |
auto[0] |
2558918 |
1 |
|
|
T23 |
54 |
|
T27 |
75 |
|
T29 |
36 |
auto[1] |
auto[1] |
auto[1] |
377200 |
1 |
|
|
T23 |
7 |
|
T27 |
5 |
|
T29 |
4 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |