cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58683 |
1 |
|
|
T101 |
987 |
|
T102 |
1520 |
|
T103 |
875 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45406 |
1 |
|
|
T101 |
223 |
|
T102 |
157 |
|
T103 |
1541 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56623 |
1 |
|
|
T101 |
31 |
|
T102 |
58 |
|
T103 |
1208 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48768 |
1 |
|
|
T101 |
142 |
|
T102 |
144 |
|
T103 |
823 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T101 |
9 |
|
T102 |
5 |
|
T103 |
40 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T101 |
9 |
|
T102 |
5 |
|
T103 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T101 |
9 |
|
T102 |
5 |
|
T103 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T101 |
9 |
|
T102 |
5 |
|
T103 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T101 |
8 |
|
T102 |
5 |
|
T103 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T101 |
9 |
|
T102 |
5 |
|
T103 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T101 |
8 |
|
T102 |
5 |
|
T103 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T101 |
9 |
|
T102 |
5 |
|
T103 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T101 |
8 |
|
T102 |
5 |
|
T103 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T101 |
9 |
|
T102 |
6 |
|
T103 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T101 |
8 |
|
T102 |
5 |
|
T103 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T101 |
9 |
|
T102 |
6 |
|
T103 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T101 |
8 |
|
T102 |
5 |
|
T103 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T101 |
9 |
|
T102 |
6 |
|
T103 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T101 |
8 |
|
T102 |
5 |
|
T103 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T101 |
9 |
|
T102 |
6 |
|
T103 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T101 |
8 |
|
T102 |
5 |
|
T103 |
32 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T101 |
10 |
|
T102 |
6 |
|
T103 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T101 |
7 |
|
T102 |
5 |
|
T103 |
32 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T101 |
10 |
|
T102 |
6 |
|
T103 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T101 |
7 |
|
T102 |
5 |
|
T103 |
32 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T101 |
10 |
|
T102 |
5 |
|
T103 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T101 |
7 |
|
T102 |
5 |
|
T103 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T101 |
10 |
|
T102 |
5 |
|
T103 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T101 |
7 |
|
T102 |
5 |
|
T103 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T101 |
8 |
|
T102 |
4 |
|
T103 |
33 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T101 |
6 |
|
T102 |
5 |
|
T103 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
33 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1172 |
1 |
|
|
T101 |
6 |
|
T102 |
5 |
|
T103 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
33 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55823 |
1 |
|
|
T101 |
334 |
|
T102 |
177 |
|
T103 |
2123 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45551 |
1 |
|
|
T101 |
169 |
|
T102 |
152 |
|
T103 |
643 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62891 |
1 |
|
|
T101 |
856 |
|
T102 |
1441 |
|
T103 |
1142 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46225 |
1 |
|
|
T101 |
68 |
|
T102 |
91 |
|
T103 |
649 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
31 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T101 |
6 |
|
T102 |
6 |
|
T103 |
32 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
31 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T101 |
6 |
|
T102 |
6 |
|
T103 |
32 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
29 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T101 |
6 |
|
T102 |
6 |
|
T103 |
31 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T101 |
6 |
|
T102 |
6 |
|
T103 |
29 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T101 |
6 |
|
T102 |
7 |
|
T103 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T101 |
6 |
|
T102 |
7 |
|
T103 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T101 |
6 |
|
T102 |
6 |
|
T103 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T101 |
6 |
|
T102 |
6 |
|
T103 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T101 |
6 |
|
T102 |
6 |
|
T103 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T101 |
6 |
|
T102 |
6 |
|
T103 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1200 |
1 |
|
|
T101 |
6 |
|
T102 |
6 |
|
T103 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1172 |
1 |
|
|
T101 |
6 |
|
T102 |
6 |
|
T103 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1175 |
1 |
|
|
T101 |
3 |
|
T102 |
4 |
|
T103 |
19 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59213 |
1 |
|
|
T101 |
111 |
|
T102 |
1572 |
|
T103 |
1945 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47702 |
1 |
|
|
T101 |
126 |
|
T102 |
159 |
|
T103 |
791 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59860 |
1 |
|
|
T101 |
894 |
|
T102 |
115 |
|
T103 |
1245 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43143 |
1 |
|
|
T101 |
204 |
|
T102 |
92 |
|
T103 |
623 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T101 |
10 |
|
T102 |
4 |
|
T103 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1666 |
1 |
|
|
T101 |
10 |
|
T102 |
4 |
|
T103 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T101 |
10 |
|
T102 |
4 |
|
T103 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T101 |
10 |
|
T102 |
4 |
|
T103 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T101 |
10 |
|
T102 |
4 |
|
T103 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T101 |
9 |
|
T102 |
4 |
|
T103 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T101 |
10 |
|
T102 |
4 |
|
T103 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T101 |
9 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T101 |
9 |
|
T102 |
4 |
|
T103 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T101 |
9 |
|
T102 |
5 |
|
T103 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T101 |
9 |
|
T102 |
4 |
|
T103 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T101 |
9 |
|
T102 |
5 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T101 |
9 |
|
T102 |
4 |
|
T103 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T101 |
9 |
|
T102 |
5 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T101 |
8 |
|
T102 |
4 |
|
T103 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T101 |
8 |
|
T102 |
5 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T101 |
8 |
|
T102 |
4 |
|
T103 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T101 |
8 |
|
T102 |
4 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1237 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1171 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62731 |
1 |
|
|
T101 |
255 |
|
T102 |
238 |
|
T103 |
883 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41404 |
1 |
|
|
T101 |
129 |
|
T102 |
176 |
|
T103 |
1042 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57802 |
1 |
|
|
T101 |
926 |
|
T102 |
49 |
|
T103 |
764 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47116 |
1 |
|
|
T101 |
153 |
|
T102 |
1404 |
|
T103 |
1709 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T101 |
6 |
|
T102 |
7 |
|
T103 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1694 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T101 |
6 |
|
T102 |
7 |
|
T103 |
39 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1660 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T101 |
6 |
|
T102 |
7 |
|
T103 |
37 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T101 |
6 |
|
T102 |
7 |
|
T103 |
36 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
44 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
35 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
35 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
33 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
37 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
37 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
37 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
36 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
34 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61391 |
1 |
|
|
T101 |
58 |
|
T102 |
205 |
|
T103 |
1143 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45451 |
1 |
|
|
T101 |
122 |
|
T102 |
118 |
|
T103 |
1698 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60910 |
1 |
|
|
T101 |
1021 |
|
T102 |
1498 |
|
T103 |
636 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43315 |
1 |
|
|
T101 |
217 |
|
T102 |
102 |
|
T103 |
889 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T101 |
8 |
|
T102 |
3 |
|
T103 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T101 |
7 |
|
T102 |
2 |
|
T103 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T101 |
8 |
|
T102 |
3 |
|
T103 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
40 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T101 |
8 |
|
T102 |
3 |
|
T103 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T101 |
8 |
|
T102 |
3 |
|
T103 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T101 |
7 |
|
T102 |
3 |
|
T103 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T101 |
7 |
|
T102 |
3 |
|
T103 |
36 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
36 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
36 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
36 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
36 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
34 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
34 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
34 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1197 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
34 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1211 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
34 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1167 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
34 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
34 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1140 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
34 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1162 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
31 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59061 |
1 |
|
|
T102 |
1529 |
|
T103 |
975 |
|
T104 |
743 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45784 |
1 |
|
|
T101 |
391 |
|
T102 |
184 |
|
T103 |
906 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54966 |
1 |
|
|
T102 |
64 |
|
T103 |
1131 |
|
T104 |
748 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48787 |
1 |
|
|
T101 |
883 |
|
T102 |
113 |
|
T103 |
1513 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T102 |
2 |
|
T103 |
14 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1698 |
1 |
|
|
T101 |
15 |
|
T102 |
6 |
|
T103 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1704 |
1 |
|
|
T101 |
15 |
|
T102 |
6 |
|
T103 |
33 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T102 |
2 |
|
T103 |
14 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T101 |
15 |
|
T102 |
6 |
|
T103 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1668 |
1 |
|
|
T101 |
15 |
|
T102 |
6 |
|
T103 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T102 |
2 |
|
T103 |
14 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T101 |
15 |
|
T102 |
6 |
|
T103 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T101 |
15 |
|
T102 |
6 |
|
T103 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T102 |
2 |
|
T103 |
14 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T101 |
15 |
|
T102 |
6 |
|
T103 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T101 |
14 |
|
T102 |
6 |
|
T103 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T102 |
2 |
|
T103 |
14 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T101 |
15 |
|
T102 |
6 |
|
T103 |
36 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T101 |
14 |
|
T102 |
6 |
|
T103 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T102 |
2 |
|
T103 |
14 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T101 |
15 |
|
T102 |
6 |
|
T103 |
35 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T101 |
13 |
|
T102 |
5 |
|
T103 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T102 |
2 |
|
T103 |
14 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T101 |
15 |
|
T102 |
6 |
|
T103 |
35 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T101 |
12 |
|
T102 |
5 |
|
T103 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T102 |
2 |
|
T103 |
14 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T101 |
15 |
|
T102 |
6 |
|
T103 |
34 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T101 |
12 |
|
T102 |
5 |
|
T103 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T102 |
2 |
|
T103 |
14 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T101 |
15 |
|
T102 |
5 |
|
T103 |
33 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T102 |
2 |
|
T103 |
19 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T101 |
13 |
|
T102 |
5 |
|
T103 |
24 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T102 |
2 |
|
T103 |
14 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T101 |
14 |
|
T102 |
5 |
|
T103 |
32 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T102 |
2 |
|
T103 |
19 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T101 |
13 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T102 |
2 |
|
T103 |
14 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T101 |
13 |
|
T102 |
5 |
|
T103 |
32 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T102 |
2 |
|
T103 |
19 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T101 |
13 |
|
T102 |
5 |
|
T103 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T102 |
2 |
|
T103 |
14 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T101 |
13 |
|
T102 |
5 |
|
T103 |
32 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T102 |
2 |
|
T103 |
19 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T101 |
13 |
|
T102 |
5 |
|
T103 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T102 |
2 |
|
T103 |
14 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T101 |
13 |
|
T102 |
5 |
|
T103 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T102 |
2 |
|
T103 |
19 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T101 |
10 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T102 |
2 |
|
T103 |
14 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T101 |
13 |
|
T102 |
4 |
|
T103 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T102 |
2 |
|
T103 |
19 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T101 |
10 |
|
T102 |
5 |
|
T103 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T102 |
2 |
|
T103 |
14 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T101 |
11 |
|
T102 |
4 |
|
T103 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T102 |
2 |
|
T103 |
19 |
|
T104 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T101 |
8 |
|
T102 |
5 |
|
T103 |
16 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59172 |
1 |
|
|
T101 |
138 |
|
T102 |
109 |
|
T103 |
1079 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46793 |
1 |
|
|
T101 |
155 |
|
T102 |
1458 |
|
T103 |
1598 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57628 |
1 |
|
|
T101 |
136 |
|
T102 |
122 |
|
T103 |
1226 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45725 |
1 |
|
|
T101 |
959 |
|
T102 |
173 |
|
T103 |
621 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T101 |
6 |
|
T102 |
8 |
|
T103 |
31 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T101 |
3 |
|
T102 |
4 |
|
T103 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1645 |
1 |
|
|
T101 |
8 |
|
T102 |
5 |
|
T103 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T101 |
6 |
|
T102 |
8 |
|
T103 |
31 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T101 |
3 |
|
T102 |
4 |
|
T103 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T101 |
8 |
|
T102 |
5 |
|
T103 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T101 |
6 |
|
T102 |
8 |
|
T103 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T101 |
3 |
|
T102 |
4 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T101 |
8 |
|
T102 |
5 |
|
T103 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T101 |
6 |
|
T102 |
8 |
|
T103 |
30 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T101 |
3 |
|
T102 |
4 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T101 |
8 |
|
T102 |
5 |
|
T103 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T101 |
6 |
|
T102 |
8 |
|
T103 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
29 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T101 |
6 |
|
T102 |
8 |
|
T103 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T101 |
6 |
|
T102 |
8 |
|
T103 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T101 |
7 |
|
T102 |
5 |
|
T103 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T101 |
6 |
|
T102 |
8 |
|
T103 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T101 |
7 |
|
T102 |
5 |
|
T103 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T101 |
6 |
|
T102 |
8 |
|
T103 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T101 |
6 |
|
T102 |
8 |
|
T103 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T101 |
5 |
|
T102 |
7 |
|
T103 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T101 |
5 |
|
T102 |
7 |
|
T103 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1192 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63186 |
1 |
|
|
T101 |
959 |
|
T102 |
180 |
|
T103 |
2021 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43495 |
1 |
|
|
T101 |
192 |
|
T102 |
139 |
|
T103 |
757 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62334 |
1 |
|
|
T101 |
80 |
|
T102 |
1600 |
|
T103 |
1139 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40492 |
1 |
|
|
T101 |
147 |
|
T102 |
36 |
|
T103 |
568 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T101 |
7 |
|
T102 |
3 |
|
T103 |
35 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T101 |
7 |
|
T102 |
2 |
|
T103 |
34 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T101 |
7 |
|
T102 |
3 |
|
T103 |
35 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T101 |
7 |
|
T102 |
2 |
|
T103 |
34 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T101 |
7 |
|
T102 |
3 |
|
T103 |
35 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T101 |
7 |
|
T102 |
2 |
|
T103 |
33 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T101 |
7 |
|
T102 |
3 |
|
T103 |
35 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T101 |
7 |
|
T102 |
2 |
|
T103 |
32 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T101 |
7 |
|
T102 |
3 |
|
T103 |
35 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
35 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
34 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
33 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
33 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
32 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1175 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
22 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58121 |
1 |
|
|
T101 |
322 |
|
T102 |
1465 |
|
T103 |
517 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45415 |
1 |
|
|
T101 |
61 |
|
T102 |
37 |
|
T103 |
943 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58419 |
1 |
|
|
T101 |
191 |
|
T102 |
241 |
|
T103 |
677 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45947 |
1 |
|
|
T101 |
845 |
|
T102 |
167 |
|
T103 |
2070 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1656 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
51 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1649 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
49 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
48 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
48 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
47 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T101 |
5 |
|
T102 |
5 |
|
T103 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T101 |
5 |
|
T102 |
5 |
|
T103 |
53 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T101 |
5 |
|
T102 |
5 |
|
T103 |
52 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
43 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T101 |
5 |
|
T102 |
5 |
|
T103 |
52 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
52 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
51 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1211 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
43 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58459 |
1 |
|
|
T101 |
908 |
|
T102 |
112 |
|
T103 |
1126 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42291 |
1 |
|
|
T101 |
106 |
|
T102 |
99 |
|
T103 |
1725 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61562 |
1 |
|
|
T101 |
194 |
|
T102 |
184 |
|
T103 |
827 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48088 |
1 |
|
|
T101 |
204 |
|
T102 |
1495 |
|
T103 |
846 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T101 |
8 |
|
T102 |
7 |
|
T103 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T101 |
6 |
|
T102 |
7 |
|
T103 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T101 |
8 |
|
T102 |
7 |
|
T103 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T101 |
6 |
|
T102 |
7 |
|
T103 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T101 |
8 |
|
T102 |
7 |
|
T103 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T101 |
6 |
|
T102 |
6 |
|
T103 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T101 |
8 |
|
T102 |
7 |
|
T103 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T101 |
6 |
|
T102 |
5 |
|
T103 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T101 |
8 |
|
T102 |
7 |
|
T103 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T101 |
8 |
|
T102 |
7 |
|
T103 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
32 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T101 |
8 |
|
T102 |
6 |
|
T103 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
32 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
26 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
32 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
26 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T101 |
6 |
|
T102 |
6 |
|
T103 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T101 |
6 |
|
T102 |
6 |
|
T103 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T101 |
6 |
|
T102 |
6 |
|
T103 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T101 |
6 |
|
T102 |
6 |
|
T103 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T101 |
6 |
|
T102 |
6 |
|
T103 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T101 |
6 |
|
T102 |
6 |
|
T103 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T101 |
6 |
|
T102 |
6 |
|
T103 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1205 |
1 |
|
|
T101 |
6 |
|
T102 |
6 |
|
T103 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1169 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
23 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
28 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55427 |
1 |
|
|
T101 |
917 |
|
T102 |
217 |
|
T103 |
901 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49331 |
1 |
|
|
T101 |
220 |
|
T102 |
70 |
|
T103 |
789 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61098 |
1 |
|
|
T101 |
82 |
|
T102 |
1558 |
|
T103 |
2050 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44116 |
1 |
|
|
T101 |
174 |
|
T102 |
54 |
|
T103 |
861 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T101 |
1 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T101 |
10 |
|
T102 |
2 |
|
T103 |
32 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T101 |
10 |
|
T102 |
4 |
|
T103 |
31 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T101 |
1 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T101 |
10 |
|
T102 |
2 |
|
T103 |
32 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T101 |
9 |
|
T102 |
4 |
|
T103 |
31 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T101 |
1 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T101 |
10 |
|
T102 |
2 |
|
T103 |
31 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T101 |
9 |
|
T102 |
4 |
|
T103 |
31 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T101 |
1 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T101 |
10 |
|
T102 |
2 |
|
T103 |
31 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T101 |
9 |
|
T102 |
4 |
|
T103 |
31 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T101 |
1 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T101 |
9 |
|
T102 |
2 |
|
T103 |
31 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T101 |
9 |
|
T102 |
4 |
|
T103 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T101 |
1 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T101 |
9 |
|
T102 |
2 |
|
T103 |
31 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T101 |
9 |
|
T102 |
4 |
|
T103 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T101 |
1 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T101 |
9 |
|
T102 |
2 |
|
T103 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T101 |
9 |
|
T102 |
4 |
|
T103 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T101 |
1 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T101 |
9 |
|
T102 |
2 |
|
T103 |
27 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T101 |
9 |
|
T102 |
4 |
|
T103 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T101 |
1 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T101 |
8 |
|
T102 |
2 |
|
T103 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T102 |
3 |
|
T103 |
15 |
|
T104 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T101 |
10 |
|
T102 |
4 |
|
T103 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T101 |
1 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T101 |
8 |
|
T102 |
2 |
|
T103 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T102 |
3 |
|
T103 |
15 |
|
T104 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T101 |
10 |
|
T102 |
3 |
|
T103 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T101 |
1 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T101 |
8 |
|
T102 |
2 |
|
T103 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T102 |
3 |
|
T103 |
15 |
|
T104 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T101 |
10 |
|
T102 |
3 |
|
T103 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T101 |
1 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T101 |
7 |
|
T102 |
2 |
|
T103 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T102 |
3 |
|
T103 |
15 |
|
T104 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T101 |
10 |
|
T102 |
3 |
|
T103 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T101 |
1 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T101 |
7 |
|
T102 |
2 |
|
T103 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T102 |
3 |
|
T103 |
15 |
|
T104 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T101 |
10 |
|
T102 |
3 |
|
T103 |
27 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T101 |
1 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T102 |
3 |
|
T103 |
15 |
|
T104 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T101 |
10 |
|
T102 |
3 |
|
T103 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T101 |
1 |
|
T102 |
5 |
|
T103 |
14 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T102 |
3 |
|
T103 |
15 |
|
T104 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1195 |
1 |
|
|
T101 |
10 |
|
T102 |
3 |
|
T103 |
26 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63844 |
1 |
|
|
T101 |
124 |
|
T102 |
1412 |
|
T103 |
797 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42803 |
1 |
|
|
T101 |
128 |
|
T102 |
181 |
|
T103 |
846 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61677 |
1 |
|
|
T101 |
955 |
|
T102 |
69 |
|
T103 |
2284 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41492 |
1 |
|
|
T101 |
212 |
|
T102 |
157 |
|
T103 |
642 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T101 |
7 |
|
T102 |
9 |
|
T103 |
35 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T101 |
9 |
|
T102 |
9 |
|
T103 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T101 |
7 |
|
T102 |
9 |
|
T103 |
35 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T101 |
9 |
|
T102 |
9 |
|
T103 |
32 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T101 |
4 |
|
T102 |
9 |
|
T103 |
35 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T101 |
9 |
|
T102 |
9 |
|
T103 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T101 |
4 |
|
T102 |
8 |
|
T103 |
35 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T101 |
9 |
|
T102 |
9 |
|
T103 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T101 |
4 |
|
T102 |
8 |
|
T103 |
35 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T101 |
9 |
|
T102 |
10 |
|
T103 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T101 |
4 |
|
T102 |
8 |
|
T103 |
35 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T101 |
9 |
|
T102 |
10 |
|
T103 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T101 |
4 |
|
T102 |
8 |
|
T103 |
34 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T101 |
9 |
|
T102 |
10 |
|
T103 |
28 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T101 |
4 |
|
T102 |
8 |
|
T103 |
34 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T101 |
9 |
|
T102 |
9 |
|
T103 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T101 |
9 |
|
T102 |
9 |
|
T103 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T101 |
8 |
|
T102 |
8 |
|
T103 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T101 |
3 |
|
T102 |
7 |
|
T103 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T101 |
8 |
|
T102 |
7 |
|
T103 |
24 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T101 |
3 |
|
T102 |
7 |
|
T103 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T101 |
8 |
|
T102 |
7 |
|
T103 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T101 |
3 |
|
T102 |
7 |
|
T103 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T101 |
8 |
|
T102 |
7 |
|
T103 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T101 |
3 |
|
T102 |
7 |
|
T103 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T101 |
8 |
|
T102 |
7 |
|
T103 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1137 |
1 |
|
|
T101 |
3 |
|
T102 |
7 |
|
T103 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T101 |
8 |
|
T102 |
7 |
|
T103 |
20 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61615 |
1 |
|
|
T101 |
226 |
|
T102 |
1378 |
|
T103 |
1282 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47281 |
1 |
|
|
T101 |
802 |
|
T102 |
159 |
|
T103 |
1659 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54086 |
1 |
|
|
T101 |
304 |
|
T102 |
169 |
|
T103 |
721 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47399 |
1 |
|
|
T101 |
142 |
|
T102 |
110 |
|
T103 |
798 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T101 |
3 |
|
T102 |
9 |
|
T103 |
36 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T101 |
2 |
|
T102 |
8 |
|
T103 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T101 |
3 |
|
T102 |
9 |
|
T103 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T101 |
2 |
|
T102 |
8 |
|
T103 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T101 |
3 |
|
T102 |
8 |
|
T103 |
33 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T101 |
2 |
|
T102 |
8 |
|
T103 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T101 |
3 |
|
T102 |
8 |
|
T103 |
33 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T101 |
2 |
|
T102 |
8 |
|
T103 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T101 |
3 |
|
T102 |
8 |
|
T103 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T101 |
2 |
|
T102 |
9 |
|
T103 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T101 |
3 |
|
T102 |
8 |
|
T103 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T101 |
2 |
|
T102 |
9 |
|
T103 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T101 |
3 |
|
T102 |
8 |
|
T103 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T101 |
2 |
|
T102 |
9 |
|
T103 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T101 |
3 |
|
T102 |
8 |
|
T103 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T101 |
2 |
|
T102 |
9 |
|
T103 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T101 |
3 |
|
T102 |
8 |
|
T103 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T101 |
2 |
|
T102 |
8 |
|
T103 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T101 |
3 |
|
T102 |
7 |
|
T103 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T101 |
2 |
|
T102 |
8 |
|
T103 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T101 |
3 |
|
T102 |
7 |
|
T103 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T101 |
2 |
|
T102 |
8 |
|
T103 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T101 |
3 |
|
T102 |
7 |
|
T103 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T101 |
2 |
|
T102 |
7 |
|
T103 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T101 |
3 |
|
T102 |
7 |
|
T103 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T101 |
2 |
|
T102 |
6 |
|
T103 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T101 |
3 |
|
T102 |
7 |
|
T103 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1162 |
1 |
|
|
T101 |
3 |
|
T102 |
7 |
|
T103 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1191 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
29 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60045 |
1 |
|
|
T101 |
889 |
|
T102 |
246 |
|
T103 |
1330 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43182 |
1 |
|
|
T101 |
257 |
|
T102 |
173 |
|
T103 |
540 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57705 |
1 |
|
|
T101 |
54 |
|
T102 |
1408 |
|
T103 |
1210 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48995 |
1 |
|
|
T101 |
93 |
|
T102 |
89 |
|
T103 |
1466 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T101 |
12 |
|
T102 |
3 |
|
T103 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T101 |
12 |
|
T102 |
1 |
|
T103 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T101 |
12 |
|
T102 |
3 |
|
T103 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1593 |
1 |
|
|
T101 |
12 |
|
T102 |
1 |
|
T103 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T101 |
12 |
|
T102 |
3 |
|
T103 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T101 |
12 |
|
T102 |
1 |
|
T103 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T101 |
12 |
|
T102 |
3 |
|
T103 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T101 |
12 |
|
T102 |
1 |
|
T103 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T101 |
12 |
|
T102 |
3 |
|
T103 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T101 |
11 |
|
T102 |
2 |
|
T103 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T101 |
12 |
|
T102 |
3 |
|
T103 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T101 |
11 |
|
T102 |
2 |
|
T103 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T101 |
11 |
|
T102 |
3 |
|
T103 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T101 |
11 |
|
T102 |
2 |
|
T103 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T101 |
11 |
|
T102 |
3 |
|
T103 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T101 |
10 |
|
T102 |
2 |
|
T103 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T101 |
11 |
|
T102 |
3 |
|
T103 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T101 |
9 |
|
T102 |
2 |
|
T103 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T101 |
11 |
|
T102 |
3 |
|
T103 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T101 |
7 |
|
T102 |
2 |
|
T103 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T101 |
11 |
|
T102 |
3 |
|
T103 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T101 |
11 |
|
T102 |
3 |
|
T103 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T101 |
11 |
|
T102 |
3 |
|
T103 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T101 |
11 |
|
T102 |
3 |
|
T103 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1182 |
1 |
|
|
T101 |
11 |
|
T102 |
3 |
|
T103 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1191 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
22 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61152 |
1 |
|
|
T101 |
848 |
|
T102 |
45 |
|
T103 |
1070 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44772 |
1 |
|
|
T101 |
240 |
|
T102 |
175 |
|
T103 |
1476 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54514 |
1 |
|
|
T101 |
127 |
|
T102 |
227 |
|
T103 |
987 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47710 |
1 |
|
|
T101 |
122 |
|
T102 |
1416 |
|
T103 |
789 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T101 |
3 |
|
T103 |
22 |
|
T104 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1694 |
1 |
|
|
T101 |
10 |
|
T102 |
9 |
|
T103 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1731 |
1 |
|
|
T101 |
10 |
|
T102 |
8 |
|
T103 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T101 |
3 |
|
T103 |
22 |
|
T104 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1673 |
1 |
|
|
T101 |
10 |
|
T102 |
9 |
|
T103 |
35 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1706 |
1 |
|
|
T101 |
10 |
|
T102 |
8 |
|
T103 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T101 |
3 |
|
T103 |
22 |
|
T104 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T101 |
10 |
|
T102 |
9 |
|
T103 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1665 |
1 |
|
|
T101 |
10 |
|
T102 |
8 |
|
T103 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T101 |
3 |
|
T103 |
22 |
|
T104 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T101 |
10 |
|
T102 |
9 |
|
T103 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T101 |
9 |
|
T102 |
8 |
|
T103 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T101 |
3 |
|
T103 |
22 |
|
T104 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T101 |
10 |
|
T102 |
9 |
|
T103 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T101 |
8 |
|
T102 |
7 |
|
T103 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T101 |
3 |
|
T103 |
22 |
|
T104 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T101 |
10 |
|
T102 |
9 |
|
T103 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
35 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T101 |
3 |
|
T103 |
22 |
|
T104 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T101 |
10 |
|
T102 |
9 |
|
T103 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T101 |
3 |
|
T103 |
22 |
|
T104 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T101 |
10 |
|
T102 |
9 |
|
T103 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T101 |
3 |
|
T103 |
22 |
|
T104 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T101 |
10 |
|
T102 |
9 |
|
T103 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T101 |
3 |
|
T103 |
22 |
|
T104 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T101 |
10 |
|
T102 |
9 |
|
T103 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T101 |
3 |
|
T103 |
22 |
|
T104 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T101 |
10 |
|
T102 |
9 |
|
T103 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T101 |
6 |
|
T102 |
5 |
|
T103 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T101 |
3 |
|
T103 |
22 |
|
T104 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T101 |
10 |
|
T102 |
9 |
|
T103 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T101 |
6 |
|
T102 |
5 |
|
T103 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T101 |
3 |
|
T103 |
22 |
|
T104 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T101 |
9 |
|
T102 |
9 |
|
T103 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T101 |
3 |
|
T103 |
22 |
|
T104 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T101 |
9 |
|
T102 |
9 |
|
T103 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T101 |
3 |
|
T103 |
22 |
|
T104 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T101 |
9 |
|
T102 |
9 |
|
T103 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
27 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60309 |
1 |
|
|
T101 |
149 |
|
T102 |
107 |
|
T103 |
1066 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40884 |
1 |
|
|
T101 |
845 |
|
T102 |
253 |
|
T103 |
585 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61397 |
1 |
|
|
T101 |
164 |
|
T102 |
100 |
|
T103 |
1206 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46976 |
1 |
|
|
T101 |
313 |
|
T102 |
1391 |
|
T103 |
1756 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T101 |
7 |
|
T102 |
8 |
|
T103 |
30 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T101 |
5 |
|
T102 |
8 |
|
T103 |
32 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1576 |
1 |
|
|
T101 |
7 |
|
T102 |
8 |
|
T103 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T101 |
5 |
|
T102 |
8 |
|
T103 |
31 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T101 |
6 |
|
T102 |
7 |
|
T103 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T101 |
5 |
|
T102 |
8 |
|
T103 |
31 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T101 |
6 |
|
T102 |
7 |
|
T103 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T101 |
5 |
|
T102 |
8 |
|
T103 |
30 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T101 |
6 |
|
T102 |
7 |
|
T103 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T101 |
5 |
|
T102 |
8 |
|
T103 |
30 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T101 |
5 |
|
T102 |
7 |
|
T103 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T101 |
5 |
|
T102 |
8 |
|
T103 |
30 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T101 |
5 |
|
T102 |
7 |
|
T103 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T101 |
5 |
|
T102 |
8 |
|
T103 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T101 |
5 |
|
T102 |
7 |
|
T103 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T101 |
5 |
|
T102 |
8 |
|
T103 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T101 |
5 |
|
T102 |
7 |
|
T103 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T101 |
5 |
|
T102 |
8 |
|
T103 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T101 |
5 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T101 |
5 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T101 |
5 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T101 |
5 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T101 |
3 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T101 |
3 |
|
T102 |
7 |
|
T103 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1223 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
25 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55620 |
1 |
|
|
T101 |
440 |
|
T102 |
198 |
|
T103 |
1014 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45294 |
1 |
|
|
T101 |
49 |
|
T102 |
132 |
|
T103 |
1578 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60793 |
1 |
|
|
T101 |
854 |
|
T102 |
1517 |
|
T103 |
1506 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47624 |
1 |
|
|
T101 |
90 |
|
T102 |
68 |
|
T103 |
573 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1726 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
32 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1724 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1693 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1690 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1653 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
29 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58779 |
1 |
|
|
T101 |
135 |
|
T102 |
170 |
|
T103 |
2026 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43177 |
1 |
|
|
T101 |
94 |
|
T102 |
78 |
|
T103 |
850 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61073 |
1 |
|
|
T101 |
854 |
|
T102 |
165 |
|
T103 |
939 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46723 |
1 |
|
|
T101 |
192 |
|
T102 |
1449 |
|
T103 |
613 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T101 |
13 |
|
T102 |
7 |
|
T103 |
40 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T101 |
12 |
|
T102 |
6 |
|
T103 |
36 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T101 |
13 |
|
T102 |
6 |
|
T103 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T101 |
12 |
|
T102 |
6 |
|
T103 |
36 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T101 |
12 |
|
T102 |
6 |
|
T103 |
35 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T101 |
12 |
|
T102 |
6 |
|
T103 |
36 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T101 |
11 |
|
T102 |
6 |
|
T103 |
35 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T101 |
12 |
|
T102 |
6 |
|
T103 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T101 |
11 |
|
T102 |
6 |
|
T103 |
35 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T101 |
12 |
|
T102 |
6 |
|
T103 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T101 |
11 |
|
T102 |
6 |
|
T103 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T101 |
12 |
|
T102 |
6 |
|
T103 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T101 |
11 |
|
T102 |
6 |
|
T103 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T101 |
12 |
|
T102 |
6 |
|
T103 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T101 |
11 |
|
T102 |
5 |
|
T103 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T101 |
4 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T101 |
11 |
|
T102 |
6 |
|
T103 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T101 |
11 |
|
T102 |
5 |
|
T103 |
31 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T101 |
12 |
|
T102 |
6 |
|
T103 |
33 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T101 |
11 |
|
T102 |
5 |
|
T103 |
31 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T101 |
12 |
|
T102 |
6 |
|
T103 |
33 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T101 |
9 |
|
T102 |
5 |
|
T103 |
31 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T101 |
12 |
|
T102 |
6 |
|
T103 |
29 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T101 |
7 |
|
T102 |
5 |
|
T103 |
31 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T101 |
12 |
|
T102 |
6 |
|
T103 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
30 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1237 |
1 |
|
|
T101 |
11 |
|
T102 |
6 |
|
T103 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T101 |
11 |
|
T102 |
6 |
|
T103 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T101 |
3 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1179 |
1 |
|
|
T101 |
11 |
|
T102 |
6 |
|
T103 |
26 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63418 |
1 |
|
|
T101 |
894 |
|
T102 |
439 |
|
T103 |
732 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45738 |
1 |
|
|
T102 |
51 |
|
T103 |
945 |
|
T104 |
1419 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56239 |
1 |
|
|
T101 |
494 |
|
T102 |
1398 |
|
T103 |
1723 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43619 |
1 |
|
|
T101 |
73 |
|
T102 |
43 |
|
T103 |
968 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1692 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
44 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
44 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1576 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
44 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T101 |
2 |
|
T102 |
4 |
|
T103 |
41 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
44 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T101 |
2 |
|
T102 |
4 |
|
T103 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
44 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T101 |
2 |
|
T102 |
4 |
|
T103 |
39 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
44 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T101 |
2 |
|
T102 |
4 |
|
T103 |
37 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T102 |
5 |
|
T103 |
43 |
|
T104 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T101 |
2 |
|
T102 |
4 |
|
T103 |
36 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T102 |
4 |
|
T103 |
41 |
|
T104 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T101 |
2 |
|
T102 |
4 |
|
T103 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T102 |
3 |
|
T103 |
38 |
|
T104 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T101 |
2 |
|
T102 |
4 |
|
T103 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T102 |
3 |
|
T103 |
36 |
|
T104 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
31 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T102 |
3 |
|
T103 |
36 |
|
T104 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
30 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T102 |
3 |
|
T103 |
35 |
|
T104 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
30 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T102 |
3 |
|
T103 |
35 |
|
T104 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1183 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
29 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56641 |
1 |
|
|
T101 |
257 |
|
T102 |
26 |
|
T103 |
2310 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47902 |
1 |
|
|
T101 |
918 |
|
T102 |
1497 |
|
T103 |
687 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
65146 |
1 |
|
|
T101 |
131 |
|
T102 |
167 |
|
T103 |
1241 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39718 |
1 |
|
|
T101 |
108 |
|
T102 |
117 |
|
T103 |
462 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1670 |
1 |
|
|
T101 |
9 |
|
T102 |
10 |
|
T103 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T101 |
8 |
|
T102 |
10 |
|
T103 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T101 |
9 |
|
T102 |
10 |
|
T103 |
24 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T101 |
7 |
|
T102 |
10 |
|
T103 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T101 |
9 |
|
T102 |
10 |
|
T103 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T101 |
7 |
|
T102 |
10 |
|
T103 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T101 |
9 |
|
T102 |
10 |
|
T103 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T101 |
5 |
|
T102 |
10 |
|
T103 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T101 |
9 |
|
T102 |
10 |
|
T103 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T101 |
5 |
|
T102 |
10 |
|
T103 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T101 |
9 |
|
T102 |
10 |
|
T103 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T101 |
5 |
|
T102 |
10 |
|
T103 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T101 |
8 |
|
T102 |
10 |
|
T103 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T101 |
5 |
|
T102 |
10 |
|
T103 |
18 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T101 |
8 |
|
T102 |
10 |
|
T103 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
21 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T101 |
5 |
|
T102 |
10 |
|
T103 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T101 |
8 |
|
T102 |
10 |
|
T103 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T101 |
2 |
|
T103 |
21 |
|
T104 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T101 |
6 |
|
T102 |
10 |
|
T103 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T101 |
8 |
|
T102 |
9 |
|
T103 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T101 |
2 |
|
T103 |
21 |
|
T104 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T101 |
6 |
|
T102 |
9 |
|
T103 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T101 |
7 |
|
T102 |
9 |
|
T103 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T101 |
2 |
|
T103 |
21 |
|
T104 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T101 |
5 |
|
T102 |
9 |
|
T103 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T101 |
7 |
|
T102 |
9 |
|
T103 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T101 |
2 |
|
T103 |
21 |
|
T104 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T101 |
5 |
|
T102 |
8 |
|
T103 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T101 |
7 |
|
T102 |
9 |
|
T103 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T101 |
2 |
|
T103 |
21 |
|
T104 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T101 |
4 |
|
T102 |
8 |
|
T103 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T101 |
7 |
|
T102 |
9 |
|
T103 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T101 |
2 |
|
T103 |
21 |
|
T104 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T101 |
7 |
|
T102 |
9 |
|
T103 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T101 |
2 |
|
T103 |
21 |
|
T104 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1175 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
13 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60100 |
1 |
|
|
T101 |
199 |
|
T102 |
93 |
|
T103 |
1278 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44768 |
1 |
|
|
T101 |
155 |
|
T102 |
68 |
|
T103 |
545 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54905 |
1 |
|
|
T101 |
989 |
|
T102 |
273 |
|
T103 |
910 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49544 |
1 |
|
|
T101 |
48 |
|
T102 |
1445 |
|
T103 |
1706 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1671 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
33 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1664 |
1 |
|
|
T101 |
5 |
|
T102 |
8 |
|
T103 |
36 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1636 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
33 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T101 |
5 |
|
T102 |
7 |
|
T103 |
36 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
31 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
31 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
34 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T101 |
4 |
|
T102 |
8 |
|
T103 |
34 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T101 |
4 |
|
T102 |
8 |
|
T103 |
34 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T101 |
7 |
|
T102 |
5 |
|
T103 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T101 |
4 |
|
T102 |
8 |
|
T103 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T101 |
7 |
|
T102 |
5 |
|
T103 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T101 |
6 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T101 |
4 |
|
T102 |
8 |
|
T103 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T101 |
7 |
|
T102 |
5 |
|
T103 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T101 |
5 |
|
T102 |
7 |
|
T103 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
30 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T101 |
7 |
|
T102 |
3 |
|
T103 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T101 |
7 |
|
T102 |
3 |
|
T103 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T101 |
3 |
|
T102 |
7 |
|
T103 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
21 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T101 |
7 |
|
T102 |
3 |
|
T103 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T101 |
5 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T101 |
2 |
|
T102 |
7 |
|
T103 |
26 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61176 |
1 |
|
|
T101 |
177 |
|
T102 |
138 |
|
T103 |
2108 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45168 |
1 |
|
|
T101 |
881 |
|
T102 |
1413 |
|
T103 |
668 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57835 |
1 |
|
|
T101 |
189 |
|
T102 |
91 |
|
T103 |
1327 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45441 |
1 |
|
|
T101 |
139 |
|
T102 |
184 |
|
T103 |
624 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T101 |
9 |
|
T102 |
9 |
|
T103 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T101 |
9 |
|
T102 |
8 |
|
T103 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T101 |
9 |
|
T102 |
9 |
|
T103 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T101 |
9 |
|
T102 |
8 |
|
T103 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T101 |
8 |
|
T102 |
9 |
|
T103 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T101 |
9 |
|
T102 |
8 |
|
T103 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T101 |
8 |
|
T102 |
8 |
|
T103 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T101 |
9 |
|
T102 |
8 |
|
T103 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T101 |
8 |
|
T102 |
8 |
|
T103 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T101 |
9 |
|
T102 |
8 |
|
T103 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T101 |
8 |
|
T102 |
7 |
|
T103 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T101 |
9 |
|
T102 |
8 |
|
T103 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T101 |
8 |
|
T102 |
8 |
|
T103 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T101 |
8 |
|
T102 |
8 |
|
T103 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T101 |
9 |
|
T102 |
8 |
|
T103 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T101 |
9 |
|
T102 |
8 |
|
T103 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T101 |
9 |
|
T102 |
7 |
|
T103 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T101 |
7 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T101 |
9 |
|
T102 |
7 |
|
T103 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T101 |
7 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T101 |
9 |
|
T102 |
7 |
|
T103 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T101 |
7 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T101 |
9 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T101 |
7 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
17 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T101 |
8 |
|
T102 |
7 |
|
T103 |
19 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51900 |
1 |
|
|
T101 |
313 |
|
T102 |
72 |
|
T103 |
967 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50109 |
1 |
|
|
T101 |
140 |
|
T102 |
147 |
|
T103 |
1882 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62340 |
1 |
|
|
T101 |
185 |
|
T102 |
1370 |
|
T103 |
595 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44525 |
1 |
|
|
T101 |
803 |
|
T102 |
196 |
|
T103 |
1050 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1690 |
1 |
|
|
T101 |
4 |
|
T102 |
10 |
|
T103 |
37 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T101 |
4 |
|
T102 |
9 |
|
T103 |
36 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1661 |
1 |
|
|
T101 |
4 |
|
T102 |
10 |
|
T103 |
36 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T101 |
4 |
|
T102 |
9 |
|
T103 |
35 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1640 |
1 |
|
|
T101 |
4 |
|
T102 |
10 |
|
T103 |
36 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T101 |
4 |
|
T102 |
9 |
|
T103 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T101 |
4 |
|
T102 |
10 |
|
T103 |
36 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T101 |
4 |
|
T102 |
9 |
|
T103 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T101 |
4 |
|
T102 |
10 |
|
T103 |
36 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T101 |
4 |
|
T102 |
10 |
|
T103 |
31 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T101 |
4 |
|
T102 |
10 |
|
T103 |
36 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T101 |
4 |
|
T102 |
10 |
|
T103 |
31 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T101 |
4 |
|
T102 |
9 |
|
T103 |
36 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T101 |
4 |
|
T102 |
10 |
|
T103 |
31 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T101 |
4 |
|
T102 |
9 |
|
T103 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T101 |
4 |
|
T102 |
10 |
|
T103 |
31 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T101 |
4 |
|
T102 |
8 |
|
T103 |
33 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T101 |
4 |
|
T102 |
10 |
|
T103 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T101 |
4 |
|
T102 |
8 |
|
T103 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T101 |
4 |
|
T102 |
10 |
|
T103 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T101 |
4 |
|
T102 |
8 |
|
T103 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T101 |
3 |
|
T102 |
10 |
|
T103 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T101 |
3 |
|
T102 |
8 |
|
T103 |
31 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T101 |
3 |
|
T102 |
10 |
|
T103 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T101 |
3 |
|
T102 |
7 |
|
T103 |
31 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T101 |
3 |
|
T102 |
10 |
|
T103 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T101 |
3 |
|
T102 |
7 |
|
T103 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T101 |
3 |
|
T102 |
10 |
|
T103 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T101 |
3 |
|
T102 |
7 |
|
T103 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1177 |
1 |
|
|
T101 |
3 |
|
T102 |
10 |
|
T103 |
27 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59078 |
1 |
|
|
T101 |
160 |
|
T102 |
264 |
|
T103 |
1847 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45124 |
1 |
|
|
T101 |
222 |
|
T102 |
97 |
|
T103 |
921 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60953 |
1 |
|
|
T101 |
876 |
|
T102 |
159 |
|
T103 |
768 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43471 |
1 |
|
|
T101 |
128 |
|
T102 |
1366 |
|
T103 |
769 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1686 |
1 |
|
|
T101 |
10 |
|
T102 |
3 |
|
T103 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T101 |
10 |
|
T102 |
3 |
|
T103 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T101 |
10 |
|
T102 |
3 |
|
T103 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T101 |
9 |
|
T102 |
3 |
|
T103 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T101 |
9 |
|
T102 |
3 |
|
T103 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T101 |
9 |
|
T102 |
3 |
|
T103 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T101 |
8 |
|
T102 |
3 |
|
T103 |
38 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T101 |
8 |
|
T102 |
3 |
|
T103 |
38 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T101 |
8 |
|
T102 |
3 |
|
T103 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T101 |
8 |
|
T102 |
3 |
|
T103 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T101 |
8 |
|
T102 |
3 |
|
T103 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
32 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T101 |
8 |
|
T102 |
3 |
|
T103 |
36 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
32 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T101 |
8 |
|
T102 |
3 |
|
T103 |
34 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T101 |
8 |
|
T102 |
3 |
|
T103 |
32 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T101 |
1 |
|
T102 |
4 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T101 |
8 |
|
T102 |
3 |
|
T103 |
32 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
30 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61056 |
1 |
|
|
T101 |
894 |
|
T102 |
185 |
|
T103 |
510 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49068 |
1 |
|
|
T101 |
198 |
|
T102 |
1479 |
|
T103 |
1896 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59414 |
1 |
|
|
T101 |
108 |
|
T102 |
36 |
|
T103 |
727 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40385 |
1 |
|
|
T101 |
194 |
|
T102 |
144 |
|
T103 |
1062 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T101 |
8 |
|
T102 |
9 |
|
T103 |
56 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1644 |
1 |
|
|
T101 |
9 |
|
T102 |
9 |
|
T103 |
54 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T101 |
7 |
|
T102 |
9 |
|
T103 |
55 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T101 |
9 |
|
T102 |
9 |
|
T103 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T101 |
7 |
|
T102 |
9 |
|
T103 |
54 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T101 |
9 |
|
T102 |
9 |
|
T103 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T101 |
7 |
|
T102 |
9 |
|
T103 |
53 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T101 |
9 |
|
T102 |
9 |
|
T103 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T101 |
6 |
|
T102 |
9 |
|
T103 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T101 |
9 |
|
T102 |
7 |
|
T103 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T101 |
5 |
|
T102 |
9 |
|
T103 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T101 |
9 |
|
T102 |
7 |
|
T103 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T101 |
5 |
|
T102 |
9 |
|
T103 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T101 |
9 |
|
T102 |
7 |
|
T103 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T101 |
5 |
|
T102 |
8 |
|
T103 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T101 |
9 |
|
T102 |
7 |
|
T103 |
48 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T101 |
5 |
|
T102 |
8 |
|
T103 |
48 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T101 |
10 |
|
T102 |
7 |
|
T103 |
48 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T101 |
5 |
|
T102 |
8 |
|
T103 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T101 |
10 |
|
T102 |
7 |
|
T103 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T101 |
4 |
|
T102 |
8 |
|
T103 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T101 |
10 |
|
T102 |
7 |
|
T103 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T101 |
4 |
|
T102 |
8 |
|
T103 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T101 |
10 |
|
T102 |
7 |
|
T103 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T101 |
10 |
|
T102 |
7 |
|
T103 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
39 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T101 |
10 |
|
T102 |
7 |
|
T103 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1168 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
37 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T101 |
1 |
|
T102 |
1 |
|
T103 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T101 |
10 |
|
T102 |
7 |
|
T103 |
41 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60517 |
1 |
|
|
T101 |
960 |
|
T102 |
222 |
|
T103 |
973 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41775 |
1 |
|
|
T101 |
47 |
|
T102 |
60 |
|
T103 |
1004 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58992 |
1 |
|
|
T101 |
157 |
|
T102 |
192 |
|
T103 |
814 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47952 |
1 |
|
|
T101 |
260 |
|
T102 |
1375 |
|
T103 |
1581 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1649 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T101 |
5 |
|
T102 |
3 |
|
T103 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
32 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
36 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
13 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1183 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
25 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52181 |
1 |
|
|
T101 |
206 |
|
T102 |
101 |
|
T103 |
997 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49032 |
1 |
|
|
T101 |
206 |
|
T102 |
119 |
|
T103 |
559 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57676 |
1 |
|
|
T101 |
992 |
|
T102 |
1468 |
|
T103 |
1366 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49134 |
1 |
|
|
T101 |
20 |
|
T102 |
141 |
|
T103 |
1625 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T101 |
3 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1683 |
1 |
|
|
T101 |
6 |
|
T102 |
6 |
|
T103 |
34 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T101 |
5 |
|
T102 |
5 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1707 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
35 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T101 |
3 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T101 |
6 |
|
T102 |
5 |
|
T103 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T101 |
5 |
|
T102 |
5 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1677 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
34 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T101 |
3 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T101 |
6 |
|
T102 |
5 |
|
T103 |
32 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T101 |
5 |
|
T102 |
5 |
|
T103 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1661 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
34 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T101 |
3 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T101 |
6 |
|
T102 |
5 |
|
T103 |
32 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T101 |
5 |
|
T102 |
5 |
|
T103 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T101 |
3 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T101 |
6 |
|
T102 |
5 |
|
T103 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
32 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T101 |
3 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T101 |
6 |
|
T102 |
5 |
|
T103 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T101 |
3 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T101 |
6 |
|
T102 |
5 |
|
T103 |
28 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T101 |
3 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T101 |
6 |
|
T102 |
5 |
|
T103 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T101 |
5 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T101 |
3 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T101 |
6 |
|
T102 |
5 |
|
T103 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T101 |
3 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T101 |
3 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T101 |
3 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T101 |
3 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T101 |
3 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
28 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T101 |
3 |
|
T102 |
4 |
|
T103 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T101 |
6 |
|
T102 |
4 |
|
T103 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T101 |
4 |
|
T102 |
4 |
|
T103 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
27 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51390 |
1 |
|
|
T101 |
134 |
|
T102 |
28 |
|
T103 |
878 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51339 |
1 |
|
|
T101 |
231 |
|
T102 |
1526 |
|
T103 |
785 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59064 |
1 |
|
|
T101 |
155 |
|
T102 |
108 |
|
T103 |
1942 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47498 |
1 |
|
|
T101 |
865 |
|
T102 |
204 |
|
T103 |
925 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1693 |
1 |
|
|
T101 |
8 |
|
T102 |
8 |
|
T103 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1694 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
39 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T101 |
8 |
|
T102 |
8 |
|
T103 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T101 |
8 |
|
T102 |
8 |
|
T103 |
34 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T101 |
8 |
|
T102 |
8 |
|
T103 |
33 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1593 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T101 |
8 |
|
T102 |
8 |
|
T103 |
33 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T101 |
7 |
|
T102 |
8 |
|
T103 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
35 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
35 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
35 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
35 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
35 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T101 |
6 |
|
T102 |
5 |
|
T103 |
33 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T101 |
6 |
|
T102 |
5 |
|
T103 |
33 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T101 |
6 |
|
T102 |
5 |
|
T103 |
32 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65812 |
1 |
|
|
T101 |
383 |
|
T102 |
236 |
|
T103 |
2048 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42405 |
1 |
|
|
T101 |
46 |
|
T102 |
127 |
|
T103 |
738 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54902 |
1 |
|
|
T101 |
982 |
|
T102 |
210 |
|
T103 |
1122 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47113 |
1 |
|
|
T101 |
51 |
|
T102 |
1367 |
|
T103 |
561 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T101 |
7 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T102 |
5 |
|
T103 |
34 |
|
T104 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T101 |
2 |
|
T102 |
4 |
|
T103 |
34 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T101 |
7 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T102 |
4 |
|
T103 |
34 |
|
T104 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T101 |
2 |
|
T102 |
4 |
|
T103 |
34 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T101 |
7 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T102 |
4 |
|
T103 |
34 |
|
T104 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T101 |
2 |
|
T102 |
4 |
|
T103 |
33 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T101 |
7 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T102 |
4 |
|
T103 |
34 |
|
T104 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T101 |
6 |
|
T102 |
3 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T101 |
2 |
|
T102 |
4 |
|
T103 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T101 |
7 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T102 |
4 |
|
T103 |
33 |
|
T104 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T101 |
7 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T102 |
3 |
|
T103 |
33 |
|
T104 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T101 |
7 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T102 |
3 |
|
T103 |
33 |
|
T104 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
29 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T101 |
7 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T102 |
3 |
|
T103 |
33 |
|
T104 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T101 |
7 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T102 |
3 |
|
T103 |
31 |
|
T104 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T101 |
7 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T102 |
3 |
|
T103 |
30 |
|
T104 |
17 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T101 |
7 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T102 |
3 |
|
T103 |
29 |
|
T104 |
16 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T101 |
7 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T102 |
3 |
|
T103 |
29 |
|
T104 |
16 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T101 |
6 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T101 |
7 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T102 |
3 |
|
T103 |
29 |
|
T104 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T101 |
7 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T102 |
3 |
|
T103 |
29 |
|
T104 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1211 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T101 |
7 |
|
T102 |
1 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1173 |
1 |
|
|
T102 |
3 |
|
T103 |
29 |
|
T104 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T101 |
5 |
|
T102 |
2 |
|
T103 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1178 |
1 |
|
|
T101 |
2 |
|
T102 |
5 |
|
T103 |
19 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54043 |
1 |
|
|
T101 |
258 |
|
T102 |
115 |
|
T103 |
839 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51971 |
1 |
|
|
T101 |
123 |
|
T102 |
180 |
|
T103 |
887 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50533 |
1 |
|
|
T101 |
318 |
|
T102 |
129 |
|
T103 |
2047 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
53257 |
1 |
|
|
T101 |
787 |
|
T102 |
1430 |
|
T103 |
794 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1670 |
1 |
|
|
T101 |
3 |
|
T102 |
8 |
|
T103 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T101 |
6 |
|
T102 |
7 |
|
T103 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T101 |
3 |
|
T102 |
8 |
|
T103 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T101 |
6 |
|
T102 |
7 |
|
T103 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T101 |
3 |
|
T102 |
8 |
|
T103 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T101 |
5 |
|
T102 |
7 |
|
T103 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T101 |
3 |
|
T102 |
8 |
|
T103 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T101 |
5 |
|
T102 |
7 |
|
T103 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T101 |
3 |
|
T102 |
8 |
|
T103 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T101 |
3 |
|
T102 |
8 |
|
T103 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T101 |
3 |
|
T102 |
7 |
|
T103 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T101 |
3 |
|
T102 |
7 |
|
T103 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T101 |
2 |
|
T102 |
3 |
|
T103 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T101 |
3 |
|
T102 |
7 |
|
T103 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
27 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
26 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T101 |
2 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
27 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
26 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
26 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T101 |
1 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
26 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60407 |
1 |
|
|
T101 |
237 |
|
T102 |
183 |
|
T103 |
833 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46513 |
1 |
|
|
T101 |
212 |
|
T102 |
59 |
|
T103 |
2000 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54161 |
1 |
|
|
T101 |
131 |
|
T102 |
271 |
|
T103 |
609 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47863 |
1 |
|
|
T101 |
817 |
|
T102 |
1390 |
|
T103 |
810 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1689 |
1 |
|
|
T101 |
7 |
|
T102 |
5 |
|
T103 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1721 |
1 |
|
|
T101 |
8 |
|
T102 |
6 |
|
T103 |
54 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T101 |
7 |
|
T102 |
5 |
|
T103 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
51 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T101 |
7 |
|
T102 |
5 |
|
T103 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
51 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T101 |
7 |
|
T102 |
5 |
|
T103 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
49 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T101 |
7 |
|
T102 |
5 |
|
T103 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T101 |
7 |
|
T102 |
5 |
|
T103 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T101 |
7 |
|
T102 |
6 |
|
T103 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1282 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
35 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1245 |
1 |
|
|
T101 |
7 |
|
T102 |
4 |
|
T103 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T101 |
4 |
|
T102 |
6 |
|
T103 |
33 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T101 |
3 |
|
T102 |
2 |
|
T103 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T101 |
7 |
|
T102 |
3 |
|
T103 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T101 |
2 |
|
T102 |
1 |
|
T103 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T101 |
3 |
|
T102 |
6 |
|
T103 |
33 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56259 |
1 |
|
|
T101 |
200 |
|
T102 |
193 |
|
T103 |
2042 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
55203 |
1 |
|
|
T101 |
911 |
|
T102 |
1462 |
|
T103 |
879 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54133 |
1 |
|
|
T101 |
199 |
|
T102 |
108 |
|
T103 |
976 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44414 |
1 |
|
|
T101 |
106 |
|
T102 |
102 |
|
T103 |
635 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1673 |
1 |
|
|
T101 |
8 |
|
T102 |
8 |
|
T103 |
33 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
34 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T101 |
7 |
|
T102 |
8 |
|
T103 |
31 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T101 |
7 |
|
T102 |
7 |
|
T103 |
33 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T101 |
7 |
|
T102 |
8 |
|
T103 |
31 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T101 |
6 |
|
T102 |
7 |
|
T103 |
33 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T101 |
7 |
|
T102 |
8 |
|
T103 |
31 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T101 |
4 |
|
T102 |
2 |
|
T103 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T101 |
5 |
|
T102 |
7 |
|
T103 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T101 |
7 |
|
T102 |
8 |
|
T103 |
30 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T101 |
5 |
|
T102 |
8 |
|
T103 |
32 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T101 |
7 |
|
T102 |
8 |
|
T103 |
30 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T101 |
5 |
|
T102 |
8 |
|
T103 |
31 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T101 |
7 |
|
T102 |
8 |
|
T103 |
30 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T101 |
5 |
|
T102 |
8 |
|
T103 |
31 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T101 |
7 |
|
T102 |
8 |
|
T103 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T101 |
4 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T101 |
4 |
|
T102 |
7 |
|
T103 |
30 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T101 |
6 |
|
T102 |
8 |
|
T103 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T101 |
5 |
|
T102 |
6 |
|
T103 |
30 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T101 |
6 |
|
T102 |
8 |
|
T103 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T101 |
5 |
|
T102 |
5 |
|
T103 |
30 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T101 |
6 |
|
T102 |
8 |
|
T103 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T101 |
6 |
|
T102 |
8 |
|
T103 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T101 |
4 |
|
T102 |
5 |
|
T103 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T101 |
6 |
|
T102 |
7 |
|
T103 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1245 |
1 |
|
|
T101 |
6 |
|
T102 |
7 |
|
T103 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
17 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T101 |
6 |
|
T102 |
7 |
|
T103 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T101 |
3 |
|
T102 |
1 |
|
T103 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T101 |
3 |
|
T102 |
5 |
|
T103 |
27 |