Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7636231 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
53990 |
| auto[1] |
5389170 |
1 |
|
|
T1 |
41803 |
|
T11 |
14 |
|
T13 |
64 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12342473 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
90184 |
| auto[1] |
682928 |
1 |
|
|
T1 |
5609 |
|
T11 |
3 |
|
T13 |
1 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7663912 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
53524 |
| auto[1] |
5361489 |
1 |
|
|
T1 |
42269 |
|
T11 |
56 |
|
T13 |
22 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2334992 |
1 |
|
|
T1 |
18576 |
|
T11 |
49 |
|
T14 |
65119 |
| auto[1] |
auto[0] |
auto[1] |
339884 |
1 |
|
|
T1 |
2851 |
|
T11 |
3 |
|
T14 |
9459 |
| auto[1] |
auto[1] |
auto[0] |
2343569 |
1 |
|
|
T1 |
18084 |
|
T11 |
4 |
|
T13 |
21 |
| auto[1] |
auto[1] |
auto[1] |
343044 |
1 |
|
|
T1 |
2758 |
|
T13 |
1 |
|
T14 |
10874 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |