Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7670147 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
53117 |
| auto[1] |
5355254 |
1 |
|
|
T1 |
42676 |
|
T11 |
23 |
|
T13 |
60 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12337778 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
89958 |
| auto[1] |
687623 |
1 |
|
|
T1 |
5835 |
|
T11 |
1 |
|
T13 |
1 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7638458 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
52644 |
| auto[1] |
5386943 |
1 |
|
|
T1 |
43149 |
|
T11 |
28 |
|
T13 |
35 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2345501 |
1 |
|
|
T1 |
18675 |
|
T11 |
18 |
|
T13 |
10 |
| auto[1] |
auto[0] |
auto[1] |
341935 |
1 |
|
|
T1 |
2874 |
|
T11 |
1 |
|
T14 |
10076 |
| auto[1] |
auto[1] |
auto[0] |
2353819 |
1 |
|
|
T1 |
18639 |
|
T11 |
9 |
|
T13 |
24 |
| auto[1] |
auto[1] |
auto[1] |
345688 |
1 |
|
|
T1 |
2961 |
|
T13 |
1 |
|
T14 |
9961 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |