Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7648993 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
52886 |
| auto[1] |
5376408 |
1 |
|
|
T1 |
42907 |
|
T11 |
34 |
|
T13 |
29 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10806833 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
69975 |
| auto[1] |
2218568 |
1 |
|
|
T1 |
25818 |
|
T11 |
14 |
|
T13 |
31 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7644090 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
53036 |
| auto[1] |
5381311 |
1 |
|
|
T1 |
42757 |
|
T11 |
25 |
|
T13 |
44 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1578956 |
1 |
|
|
T1 |
8597 |
|
T11 |
6 |
|
T13 |
9 |
| auto[1] |
auto[0] |
auto[1] |
1109804 |
1 |
|
|
T1 |
12809 |
|
T11 |
10 |
|
T13 |
25 |
| auto[1] |
auto[1] |
auto[0] |
1583787 |
1 |
|
|
T1 |
8342 |
|
T11 |
5 |
|
T13 |
4 |
| auto[1] |
auto[1] |
auto[1] |
1108764 |
1 |
|
|
T1 |
13009 |
|
T11 |
4 |
|
T13 |
6 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |