Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
2331708 |
1 |
|
|
T1 |
18167 |
|
T11 |
15 |
|
T13 |
5 |
auto[1] |
auto[0] |
auto[1] |
341934 |
1 |
|
|
T1 |
2835 |
|
T11 |
2 |
|
T14 |
9937 |
auto[1] |
auto[1] |
auto[0] |
2332396 |
1 |
|
|
T1 |
18888 |
|
T11 |
15 |
|
T13 |
14 |
auto[1] |
auto[1] |
auto[1] |
340061 |
1 |
|
|
T1 |
2835 |
|
T14 |
10660 |
|
T16 |
2 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |