Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7631748 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
55607 |
| auto[1] |
5393653 |
1 |
|
|
T1 |
40186 |
|
T11 |
13 |
|
T13 |
5 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10819755 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
70601 |
| auto[1] |
2205646 |
1 |
|
|
T1 |
25192 |
|
T11 |
24 |
|
T13 |
20 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7667594 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
54046 |
| auto[1] |
5357807 |
1 |
|
|
T1 |
41747 |
|
T11 |
44 |
|
T13 |
44 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1570953 |
1 |
|
|
T1 |
8764 |
|
T11 |
18 |
|
T13 |
24 |
| auto[1] |
auto[0] |
auto[1] |
1098895 |
1 |
|
|
T1 |
13573 |
|
T11 |
19 |
|
T13 |
19 |
| auto[1] |
auto[1] |
auto[0] |
1581208 |
1 |
|
|
T1 |
7791 |
|
T11 |
2 |
|
T14 |
46845 |
| auto[1] |
auto[1] |
auto[1] |
1106751 |
1 |
|
|
T1 |
11619 |
|
T11 |
5 |
|
T13 |
1 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |