Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7671082 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
53641 |
| auto[1] |
5354319 |
1 |
|
|
T1 |
42152 |
|
T11 |
25 |
|
T13 |
76 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10822046 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
70020 |
| auto[1] |
2203355 |
1 |
|
|
T1 |
25773 |
|
T11 |
7 |
|
T13 |
19 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7673701 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
54050 |
| auto[1] |
5351700 |
1 |
|
|
T1 |
41743 |
|
T11 |
40 |
|
T13 |
45 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1581235 |
1 |
|
|
T1 |
8229 |
|
T11 |
25 |
|
T13 |
9 |
| auto[1] |
auto[0] |
auto[1] |
1104878 |
1 |
|
|
T1 |
13340 |
|
T11 |
2 |
|
T13 |
6 |
| auto[1] |
auto[1] |
auto[0] |
1567110 |
1 |
|
|
T1 |
7741 |
|
T11 |
8 |
|
T13 |
17 |
| auto[1] |
auto[1] |
auto[1] |
1098477 |
1 |
|
|
T1 |
12433 |
|
T11 |
5 |
|
T13 |
13 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |