Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7667592 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
52611 |
| auto[1] |
5357809 |
1 |
|
|
T1 |
43182 |
|
T11 |
19 |
|
T13 |
66 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10836943 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
70082 |
| auto[1] |
2188458 |
1 |
|
|
T1 |
25711 |
|
T11 |
13 |
|
T13 |
24 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7707220 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
53121 |
| auto[1] |
5318181 |
1 |
|
|
T1 |
42672 |
|
T11 |
17 |
|
T13 |
40 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1562488 |
1 |
|
|
T1 |
8262 |
|
T11 |
4 |
|
T13 |
8 |
| auto[1] |
auto[0] |
auto[1] |
1097378 |
1 |
|
|
T1 |
12841 |
|
T11 |
11 |
|
T13 |
7 |
| auto[1] |
auto[1] |
auto[0] |
1567235 |
1 |
|
|
T1 |
8699 |
|
T13 |
8 |
|
T14 |
48980 |
| auto[1] |
auto[1] |
auto[1] |
1091080 |
1 |
|
|
T1 |
12870 |
|
T11 |
2 |
|
T13 |
17 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |