Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7673349 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
53024 |
| auto[1] |
5352052 |
1 |
|
|
T1 |
42769 |
|
T11 |
12 |
|
T13 |
59 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12341800 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
90117 |
| auto[1] |
683601 |
1 |
|
|
T1 |
5676 |
|
T11 |
1 |
|
T13 |
2 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7665611 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
53436 |
| auto[1] |
5359790 |
1 |
|
|
T1 |
42357 |
|
T11 |
24 |
|
T13 |
39 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2348823 |
1 |
|
|
T1 |
18048 |
|
T11 |
17 |
|
T13 |
12 |
| auto[1] |
auto[0] |
auto[1] |
344274 |
1 |
|
|
T1 |
2720 |
|
T11 |
1 |
|
T13 |
1 |
| auto[1] |
auto[1] |
auto[0] |
2327366 |
1 |
|
|
T1 |
18633 |
|
T11 |
6 |
|
T13 |
25 |
| auto[1] |
auto[1] |
auto[1] |
339327 |
1 |
|
|
T1 |
2956 |
|
T13 |
1 |
|
T14 |
10133 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |