Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7642566 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
53013 |
| auto[1] |
5382835 |
1 |
|
|
T1 |
42780 |
|
T11 |
44 |
|
T13 |
41 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12341688 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
90330 |
| auto[1] |
683713 |
1 |
|
|
T1 |
5463 |
|
T11 |
1 |
|
T13 |
2 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7663160 |
1 |
|
|
T20 |
561 |
|
T21 |
50 |
|
T1 |
53897 |
| auto[1] |
5362241 |
1 |
|
|
T1 |
41896 |
|
T11 |
24 |
|
T13 |
30 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2332404 |
1 |
|
|
T1 |
18207 |
|
T11 |
10 |
|
T13 |
16 |
| auto[1] |
auto[0] |
auto[1] |
340833 |
1 |
|
|
T1 |
2686 |
|
T13 |
1 |
|
T14 |
9874 |
| auto[1] |
auto[1] |
auto[0] |
2346124 |
1 |
|
|
T1 |
18226 |
|
T11 |
13 |
|
T13 |
12 |
| auto[1] |
auto[1] |
auto[1] |
342880 |
1 |
|
|
T1 |
2777 |
|
T11 |
1 |
|
T13 |
1 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |