Unified Coverage Report :: Group :: cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

Group : cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

---

Summary for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	38	0	38	100.00
Crosses	192	0	192	100.00

Variables for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_intr	32	0	32	100.00	100	1	1	0
cp_intr_en	2	0	2	100.00	100	1	1	2
cp_intr_state	2	0	2	100.00	100	1	1	2
cp_intr_test	2	0	2	100.00	100	1	1	2

Crosses for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
intr_test_cg_cc	192	0	192	100.00	100	1	1	0

Summary for Variable cp_intr

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_intr

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	10621723	1			T21	448		T22	355		T23	123
all_values[1]	10621723	1			T21	448		T22	355		T23	123
all_values[2]	10621723	1			T21	448		T22	355		T23	123
all_values[3]	10621723	1			T21	448		T22	355		T23	123
all_values[4]	10621723	1			T21	448		T22	355		T23	123
all_values[5]	10621723	1			T21	448		T22	355		T23	123
all_values[6]	10621723	1			T21	448		T22	355		T23	123
all_values[7]	10621723	1			T21	448		T22	355		T23	123
all_values[8]	10621723	1			T21	448		T22	355		T23	123
all_values[9]	10621723	1			T21	448		T22	355		T23	123
all_values[10]	10621723	1			T21	448		T22	355		T23	123
all_values[11]	10621723	1			T21	448		T22	355		T23	123
all_values[12]	10621723	1			T21	448		T22	355		T23	123
all_values[13]	10621723	1			T21	448		T22	355		T23	123
all_values[14]	10621723	1			T21	448		T22	355		T23	123
all_values[15]	10621723	1			T21	448		T22	355		T23	123
all_values[16]	10621723	1			T21	448		T22	355		T23	123
all_values[17]	10621723	1			T21	448		T22	355		T23	123
all_values[18]	10621723	1			T21	448		T22	355		T23	123
all_values[19]	10621723	1			T21	448		T22	355		T23	123
all_values[20]	10621723	1			T21	448		T22	355		T23	123
all_values[21]	10621723	1			T21	448		T22	355		T23	123
all_values[22]	10621723	1			T21	448		T22	355		T23	123
all_values[23]	10621723	1			T21	448		T22	355		T23	123
all_values[24]	10621723	1			T21	448		T22	355		T23	123
all_values[25]	10621723	1			T21	448		T22	355		T23	123
all_values[26]	10621723	1			T21	448		T22	355		T23	123
all_values[27]	10621723	1			T21	448		T22	355		T23	123
all_values[28]	10621723	1			T21	448		T22	355		T23	123
all_values[29]	10621723	1			T21	448		T22	355		T23	123
all_values[30]	10621723	1			T21	448		T22	355		T23	123
all_values[31]	10621723	1			T21	448		T22	355		T23	123

---

Summary for Variable cp_intr_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

203018287

1

T21

14336

T22

11360

T23

3936

auto[1]

136876849

1

T26

14846

T27

125653

T31

834058

---

Summary for Variable cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_state

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

92540364

1

T21

14336

T22

11360

T23

3936

auto[1]

247354772

1

T26

28422

T27

229906

T31

148997

---

Summary for Variable cp_intr_test

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_test

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

336223720

1

T21

14336

T22

11360

T23

3936

auto[1]

3671416

1

T27

36431

T31

17004

T32

1097

---

Summary for Cross intr_test_cg_cc

Samples crossed: cp_intr cp_intr_test cp_intr_en cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
TOTAL	192	0	192	100.00
Automatically Generated Cross Bins	192	0	192	100.00
User Defined Cross Bins	0	0	0

Automatically Generated Cross Bins for intr_test_cg_cc

Bins

cp_intr	cp_intr_test	cp_intr_en	cp_intr_state	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	auto[0]	auto[0]	auto[0]	2474899	1			T21	448		T22	355		T23	123
all_values[0]	auto[0]	auto[0]	auto[1]	3813992	1			T26	427		T27	36972		T31	23263
all_values[0]	auto[0]	auto[1]	auto[0]	419512	1			T26	14		T27	3836		T31	2540
all_values[0]	auto[0]	auto[1]	auto[1]	3798621	1			T26	514		T27	33346		T31	22820
all_values[0]	auto[1]	auto[0]	auto[1]	58092	1			T27	617		T31	244		T32	12
all_values[0]	auto[1]	auto[1]	auto[1]	56607	1			T27	538		T31	277		T32	22
all_values[1]	auto[0]	auto[0]	auto[0]	2472019	1			T21	448		T22	355		T23	123
all_values[1]	auto[0]	auto[0]	auto[1]	3793448	1			T26	519		T27	34986		T31	23371
all_values[1]	auto[0]	auto[1]	auto[0]	425952	1			T26	26		T27	3693		T31	2668
all_values[1]	auto[0]	auto[1]	auto[1]	3815786	1			T26	420		T27	36193		T31	22714
all_values[1]	auto[1]	auto[0]	auto[1]	57631	1			T27	573		T31	276		T32	13
all_values[1]	auto[1]	auto[1]	auto[1]	56887	1			T27	548		T31	266		T32	17
all_values[2]	auto[0]	auto[0]	auto[0]	2473482	1			T21	448		T22	355		T23	123
all_values[2]	auto[0]	auto[0]	auto[1]	3823128	1			T26	341		T27	35994		T31	22899
all_values[2]	auto[0]	auto[1]	auto[0]	413908	1			T26	140		T27	3561		T31	2510
all_values[2]	auto[0]	auto[1]	auto[1]	3796123	1			T26	453		T27	34744		T31	23507
all_values[2]	auto[1]	auto[0]	auto[1]	57572	1			T27	576		T31	266		T32	21
all_values[2]	auto[1]	auto[1]	auto[1]	57510	1			T27	580		T31	277		T32	13
all_values[3]	auto[0]	auto[0]	auto[0]	2472105	1			T21	448		T22	355		T23	123
all_values[3]	auto[0]	auto[0]	auto[1]	3813309	1			T26	570		T27	34869		T31	23078
all_values[3]	auto[0]	auto[1]	auto[0]	418767	1			T26	91		T27	4343		T31	2526
all_values[3]	auto[0]	auto[1]	auto[1]	3803107	1			T26	261		T27	35358		T31	23233
all_values[3]	auto[1]	auto[0]	auto[1]	57664	1			T27	570		T31	306		T32	24
all_values[3]	auto[1]	auto[1]	auto[1]	56771	1			T27	568		T31	246		T32	16
all_values[4]	auto[0]	auto[0]	auto[0]	2472128	1			T21	448		T22	355		T23	123
all_values[4]	auto[0]	auto[0]	auto[1]	3786942	1			T26	416		T27	34940		T31	22502
all_values[4]	auto[0]	auto[1]	auto[0]	416775	1			T26	28		T27	4032		T31	2676
all_values[4]	auto[0]	auto[1]	auto[1]	3830583	1			T26	485		T27	35789		T31	23669
all_values[4]	auto[1]	auto[0]	auto[1]	58300	1			T27	601		T31	259		T32	13
all_values[4]	auto[1]	auto[1]	auto[1]	56995	1			T27	545		T31	252		T32	22
all_values[5]	auto[0]	auto[0]	auto[0]	2472849	1			T21	448		T22	355		T23	123
all_values[5]	auto[0]	auto[0]	auto[1]	3851985	1			T26	454		T27	35458		T31	22261
all_values[5]	auto[0]	auto[1]	auto[0]	422548	1			T26	21		T27	3477		T31	3099
all_values[5]	auto[0]	auto[1]	auto[1]	3759711	1			T26	421		T27	35865		T31	23204
all_values[5]	auto[1]	auto[0]	auto[1]	57536	1			T27	589		T31	264		T32	16
all_values[5]	auto[1]	auto[1]	auto[1]	57094	1			T27	583		T31	263		T32	20
all_values[6]	auto[0]	auto[0]	auto[0]	2466783	1			T21	448		T22	355		T23	123
all_values[6]	auto[0]	auto[0]	auto[1]	3794159	1			T26	543		T27	35324		T31	22029
all_values[6]	auto[0]	auto[1]	auto[0]	417116	1			T26	68		T27	3661		T31	2689
all_values[6]	auto[0]	auto[1]	auto[1]	3829052	1			T26	244		T27	35189		T31	24200
all_values[6]	auto[1]	auto[0]	auto[1]	57468	1			T27	592		T31	253		T32	16
all_values[6]	auto[1]	auto[1]	auto[1]	57145	1			T27	537		T31	274		T32	17
all_values[7]	auto[0]	auto[0]	auto[0]	2472001	1			T21	448		T22	355		T23	123
all_values[7]	auto[0]	auto[0]	auto[1]	3830168	1			T26	549		T27	37057		T31	23786
all_values[7]	auto[0]	auto[1]	auto[0]	415837	1			T26	37		T27	3648		T31	2459
all_values[7]	auto[0]	auto[1]	auto[1]	3789050	1			T26	334		T27	33812		T31	22469
all_values[7]	auto[1]	auto[0]	auto[1]	57178	1			T27	623		T31	250		T32	16
all_values[7]	auto[1]	auto[1]	auto[1]	57489	1			T27	569		T31	272		T32	14
all_values[8]	auto[0]	auto[0]	auto[0]	2470748	1			T21	448		T22	355		T23	123
all_values[8]	auto[0]	auto[0]	auto[1]	3824314	1			T26	419		T27	35289		T31	23083
all_values[8]	auto[0]	auto[1]	auto[0]	424892	1			T26	24		T27	4007		T31	2710
all_values[8]	auto[0]	auto[1]	auto[1]	3787172	1			T26	514		T27	35647		T31	22679
all_values[8]	auto[1]	auto[0]	auto[1]	57355	1			T27	529		T31	275		T32	24
all_values[8]	auto[1]	auto[1]	auto[1]	57242	1			T27	588		T31	245		T32	8
all_values[9]	auto[0]	auto[0]	auto[0]	2469803	1			T21	448		T22	355		T23	123
all_values[9]	auto[0]	auto[0]	auto[1]	3798976	1			T26	538		T27	33040		T31	21992
all_values[9]	auto[0]	auto[1]	auto[0]	415074	1			T26	27		T27	3699		T31	2689
all_values[9]	auto[0]	auto[1]	auto[1]	3823431	1			T26	380		T27	37929		T31	24243
all_values[9]	auto[1]	auto[0]	auto[1]	58014	1			T27	581		T31	271		T32	16
all_values[9]	auto[1]	auto[1]	auto[1]	56425	1			T27	526		T31	247		T32	16
all_values[10]	auto[0]	auto[0]	auto[0]	2474264	1			T21	448		T22	355		T23	123
all_values[10]	auto[0]	auto[0]	auto[1]	3820634	1			T26	315		T27	37712		T31	23899
all_values[10]	auto[0]	auto[1]	auto[0]	414694	1			T26	46		T27	3678		T31	2956
all_values[10]	auto[0]	auto[1]	auto[1]	3797191	1			T26	560		T27	33103		T31	22108
all_values[10]	auto[1]	auto[0]	auto[1]	57926	1			T27	574		T31	309		T32	15
all_values[10]	auto[1]	auto[1]	auto[1]	57014	1			T27	556		T31	241		T32	13
all_values[11]	auto[0]	auto[0]	auto[0]	2471623	1			T21	448		T22	355		T23	123
all_values[11]	auto[0]	auto[0]	auto[1]	3820223	1			T26	463		T27	34786		T31	23995
all_values[11]	auto[0]	auto[1]	auto[0]	418689	1			T26	47		T27	3352		T31	2859
all_values[11]	auto[0]	auto[1]	auto[1]	3796505	1			T26	442		T27	36080		T31	22054
all_values[11]	auto[1]	auto[0]	auto[1]	57891	1			T27	624		T31	262		T32	12
all_values[11]	auto[1]	auto[1]	auto[1]	56792	1			T27	546		T31	267		T32	15
all_values[12]	auto[0]	auto[0]	auto[0]	2479545	1			T21	448		T22	355		T23	123
all_values[12]	auto[0]	auto[0]	auto[1]	3781963	1			T26	490		T27	34816		T31	22033
all_values[12]	auto[0]	auto[1]	auto[0]	424241	1			T26	35		T27	4102		T31	3009
all_values[12]	auto[0]	auto[1]	auto[1]	3821089	1			T26	413		T27	35526		T31	23548
all_values[12]	auto[1]	auto[0]	auto[1]	57776	1			T27	621		T31	249		T32	12
all_values[12]	auto[1]	auto[1]	auto[1]	57109	1			T27	523		T31	276		T32	18
all_values[13]	auto[0]	auto[0]	auto[0]	2474513	1			T21	448		T22	355		T23	123
all_values[13]	auto[0]	auto[0]	auto[1]	3807434	1			T26	379		T27	35575		T31	22529
all_values[13]	auto[0]	auto[1]	auto[0]	411074	1			T26	51		T27	3887		T31	2877
all_values[13]	auto[0]	auto[1]	auto[1]	3813842	1			T26	522		T27	34909		T31	23518
all_values[13]	auto[1]	auto[0]	auto[1]	58089	1			T27	560		T31	262		T32	17
all_values[13]	auto[1]	auto[1]	auto[1]	56771	1			T27	588		T31	263		T32	16
all_values[14]	auto[0]	auto[0]	auto[0]	2470952	1			T21	448		T22	355		T23	123
all_values[14]	auto[0]	auto[0]	auto[1]	3831046	1			T26	416		T27	34878		T31	23672
all_values[14]	auto[0]	auto[1]	auto[0]	423884	1			T26	59		T27	4148		T31	2775
all_values[14]	auto[0]	auto[1]	auto[1]	3781401	1			T26	463		T27	35502		T31	22100
all_values[14]	auto[1]	auto[0]	auto[1]	56882	1			T27	596		T31	277		T32	18
all_values[14]	auto[1]	auto[1]	auto[1]	57558	1			T27	544		T31	254		T32	20
all_values[15]	auto[0]	auto[0]	auto[0]	2473853	1			T21	448		T22	355		T23	123
all_values[15]	auto[0]	auto[0]	auto[1]	3802371	1			T26	463		T27	37406		T31	22086
all_values[15]	auto[0]	auto[1]	auto[0]	421899	1			T26	63		T27	3608		T31	2983
all_values[15]	auto[0]	auto[1]	auto[1]	3809356	1			T26	415		T27	33257		T31	23487
all_values[15]	auto[1]	auto[0]	auto[1]	57136	1			T27	650		T31	249		T32	11
all_values[15]	auto[1]	auto[1]	auto[1]	57108	1			T27	527		T31	271		T32	29
all_values[16]	auto[0]	auto[0]	auto[0]	2471032	1			T21	448		T22	355		T23	123
all_values[16]	auto[0]	auto[0]	auto[1]	3792725	1			T26	387		T27	35437		T31	22088
all_values[16]	auto[0]	auto[1]	auto[0]	426874	1			T26	51		T27	3812		T31	2924
all_values[16]	auto[0]	auto[1]	auto[1]	3815568	1			T26	485		T27	35345		T31	24090
all_values[16]	auto[1]	auto[0]	auto[1]	58076	1			T27	631		T31	265		T32	30
all_values[16]	auto[1]	auto[1]	auto[1]	57448	1			T27	546		T31	271		T32	19
all_values[17]	auto[0]	auto[0]	auto[0]	2475160	1			T21	448		T22	355		T23	123
all_values[17]	auto[0]	auto[0]	auto[1]	3811442	1			T26	436		T27	35090		T31	23276
all_values[17]	auto[0]	auto[1]	auto[0]	413052	1			T26	26		T27	3927		T31	2395
all_values[17]	auto[0]	auto[1]	auto[1]	3807650	1			T26	492		T27	35437		T31	22761
all_values[17]	auto[1]	auto[0]	auto[1]	57363	1			T27	584		T31	279		T32	16
all_values[17]	auto[1]	auto[1]	auto[1]	57056	1			T27	553		T31	280		T32	17
all_values[18]	auto[0]	auto[0]	auto[0]	2474121	1			T21	448		T22	355		T23	123
all_values[18]	auto[0]	auto[0]	auto[1]	3827976	1			T26	609		T27	35676		T31	24391
all_values[18]	auto[0]	auto[1]	auto[0]	418334	1			T26	36		T27	3908		T31	2584
all_values[18]	auto[0]	auto[1]	auto[1]	3786721	1			T26	279		T27	34691		T31	21891
all_values[18]	auto[1]	auto[0]	auto[1]	57134	1			T27	578		T31	272		T32	12
all_values[18]	auto[1]	auto[1]	auto[1]	57437	1			T27	539		T31	273		T32	26
all_values[19]	auto[0]	auto[0]	auto[0]	2475481	1			T21	448		T22	355		T23	123
all_values[19]	auto[0]	auto[0]	auto[1]	3824150	1			T26	459		T27	37250		T31	22346
all_values[19]	auto[0]	auto[1]	auto[0]	422912	1			T26	23		T27	4013		T31	2522
all_values[19]	auto[0]	auto[1]	auto[1]	3784725	1			T26	438		T27	33308		T31	24044
all_values[19]	auto[1]	auto[0]	auto[1]	57625	1			T27	595		T31	282		T32	26
all_values[19]	auto[1]	auto[1]	auto[1]	56830	1			T27	555		T31	242		T32	13
all_values[20]	auto[0]	auto[0]	auto[0]	2473603	1			T21	448		T22	355		T23	123
all_values[20]	auto[0]	auto[0]	auto[1]	3806135	1			T26	409		T27	36509		T31	22852
all_values[20]	auto[0]	auto[1]	auto[0]	417172	1			T26	46		T27	3628		T31	2331
all_values[20]	auto[0]	auto[1]	auto[1]	3810306	1			T26	476		T27	34602		T31	23674
all_values[20]	auto[1]	auto[0]	auto[1]	57903	1			T27	549		T31	278		T32	21
all_values[20]	auto[1]	auto[1]	auto[1]	56604	1			T27	566		T31	245		T32	15
all_values[21]	auto[0]	auto[0]	auto[0]	2477318	1			T21	448		T22	355		T23	123
all_values[21]	auto[0]	auto[0]	auto[1]	3812460	1			T26	460		T27	36752		T31	22231
all_values[21]	auto[0]	auto[1]	auto[0]	419545	1			T26	17		T27	4104		T31	2811
all_values[21]	auto[0]	auto[1]	auto[1]	3797851	1			T26	422		T27	34047		T31	24051
all_values[21]	auto[1]	auto[0]	auto[1]	57870	1			T27	583		T31	263		T32	21
all_values[21]	auto[1]	auto[1]	auto[1]	56679	1			T27	547		T31	277		T32	19
all_values[22]	auto[0]	auto[0]	auto[0]	2470071	1			T21	448		T22	355		T23	123
all_values[22]	auto[0]	auto[0]	auto[1]	3834783	1			T26	577		T27	37924		T31	22660
all_values[22]	auto[0]	auto[1]	auto[0]	418613	1			T26	30		T27	3682		T31	2814
all_values[22]	auto[0]	auto[1]	auto[1]	3783658	1			T26	307		T27	32485		T31	23375
all_values[22]	auto[1]	auto[0]	auto[1]	57267	1			T27	547		T31	240		T32	16
all_values[22]	auto[1]	auto[1]	auto[1]	57331	1			T27	526		T31	286		T32	19
all_values[23]	auto[0]	auto[0]	auto[0]	2474788	1			T21	448		T22	355		T23	123
all_values[23]	auto[0]	auto[0]	auto[1]	3798617	1			T26	553		T27	34925		T31	23471
all_values[23]	auto[0]	auto[1]	auto[0]	420854	1			T26	16		T27	3987		T31	2904
all_values[23]	auto[0]	auto[1]	auto[1]	3812386	1			T26	357		T27	35476		T31	22353
all_values[23]	auto[1]	auto[0]	auto[1]	57715	1			T27	567		T31	306		T32	21
all_values[23]	auto[1]	auto[1]	auto[1]	57363	1			T27	553		T31	220		T32	16
all_values[24]	auto[0]	auto[0]	auto[0]	2471325	1			T21	448		T22	355		T23	123
all_values[24]	auto[0]	auto[0]	auto[1]	3824162	1			T26	530		T27	35228		T31	23152
all_values[24]	auto[0]	auto[1]	auto[0]	413018	1			T26	12		T27	3990		T31	2677
all_values[24]	auto[0]	auto[1]	auto[1]	3797819	1			T26	381		T27	35413		T31	22651
all_values[24]	auto[1]	auto[0]	auto[1]	57699	1			T27	563		T31	298		T32	16
all_values[24]	auto[1]	auto[1]	auto[1]	57700	1			T27	564		T31	254		T32	21
all_values[25]	auto[0]	auto[0]	auto[0]	2479965	1			T21	448		T22	355		T23	123
all_values[25]	auto[0]	auto[0]	auto[1]	3805954	1			T26	329		T27	34274		T31	23353
all_values[25]	auto[0]	auto[1]	auto[0]	413902	1			T26	49		T27	3574		T31	2789
all_values[25]	auto[0]	auto[1]	auto[1]	3807507	1			T26	582		T27	36721		T31	22525
all_values[25]	auto[1]	auto[0]	auto[1]	57385	1			T27	594		T31	262		T32	18
all_values[25]	auto[1]	auto[1]	auto[1]	57010	1			T27	558		T31	280		T32	16
all_values[26]	auto[0]	auto[0]	auto[0]	2472103	1			T21	448		T22	355		T23	123
all_values[26]	auto[0]	auto[0]	auto[1]	3811284	1			T26	506		T27	36351		T31	21854
all_values[26]	auto[0]	auto[1]	auto[0]	424514	1			T26	15		T27	3746		T31	2748
all_values[26]	auto[0]	auto[1]	auto[1]	3799359	1			T26	438		T27	34887		T31	24090
all_values[26]	auto[1]	auto[0]	auto[1]	57158	1			T27	591		T31	283		T32	18
all_values[26]	auto[1]	auto[1]	auto[1]	57305	1			T27	525		T31	243		T32	10
all_values[27]	auto[0]	auto[0]	auto[0]	2476656	1			T21	448		T22	355		T23	123
all_values[27]	auto[0]	auto[0]	auto[1]	3791871	1			T26	520		T27	36309		T31	23593
all_values[27]	auto[0]	auto[1]	auto[0]	418429	1			T26	46		T27	3820		T31	2961
all_values[27]	auto[0]	auto[1]	auto[1]	3820312	1			T26	319		T27	34445		T31	22177
all_values[27]	auto[1]	auto[0]	auto[1]	57580	1			T27	600		T31	252		T32	21
all_values[27]	auto[1]	auto[1]	auto[1]	56875	1			T27	539		T31	252		T32	20
all_values[28]	auto[0]	auto[0]	auto[0]	2464722	1			T21	448		T22	355		T23	123
all_values[28]	auto[0]	auto[0]	auto[1]	3819545	1			T26	507		T27	35531		T31	23242
all_values[28]	auto[0]	auto[1]	auto[0]	412672	1			T26	29		T27	4358		T31	2568
all_values[28]	auto[0]	auto[1]	auto[1]	3809608	1			T26	422		T27	34815		T31	22657
all_values[28]	auto[1]	auto[0]	auto[1]	57787	1			T27	591		T31	253		T32	16
all_values[28]	auto[1]	auto[1]	auto[1]	57389	1			T27	532		T31	273		T32	20
all_values[29]	auto[0]	auto[0]	auto[0]	2471174	1			T21	448		T22	355		T23	123
all_values[29]	auto[0]	auto[0]	auto[1]	3846432	1			T26	282		T27	36611		T31	23368
all_values[29]	auto[0]	auto[1]	auto[0]	417986	1			T26	74		T27	4137		T31	2544
all_values[29]	auto[0]	auto[1]	auto[1]	3771160	1			T26	569		T27	33987		T31	23050
all_values[29]	auto[1]	auto[0]	auto[1]	58032	1			T27	568		T31	283		T32	17
all_values[29]	auto[1]	auto[1]	auto[1]	56939	1			T27	534		T31	261		T32	15
all_values[30]	auto[0]	auto[0]	auto[0]	2475132	1			T21	448		T22	355		T23	123
all_values[30]	auto[0]	auto[0]	auto[1]	3827355	1			T26	514		T27	36406		T31	22506
all_values[30]	auto[0]	auto[1]	auto[0]	420461	1			T26	58		T27	3746		T31	2547
all_values[30]	auto[0]	auto[1]	auto[1]	3783975	1			T26	352		T27	34190		T31	23089
all_values[30]	auto[1]	auto[0]	auto[1]	57532	1			T27	582		T31	302		T32	18
all_values[30]	auto[1]	auto[1]	auto[1]	57268	1			T27	573		T31	225		T32	8
all_values[31]	auto[0]	auto[0]	auto[0]	2474571	1			T21	448		T22	355		T23	123
all_values[31]	auto[0]	auto[0]	auto[1]	3806366	1			T26	557		T27	37229		T31	23207
all_values[31]	auto[0]	auto[1]	auto[0]	418375	1			T26	56		T27	3705		T31	2653
all_values[31]	auto[0]	auto[1]	auto[1]	3807382	1			T26	325		T27	33928		T31	22872
all_values[31]	auto[1]	auto[0]	auto[1]	57513	1			T27	588		T31	256		T32	11
all_values[31]	auto[1]	auto[1]	auto[1]	57516	1			T27	568		T31	285		T32	13

User Defined Cross Bins for intr_test_cg_cc

Excluded/Illegal bins

NAME	COUNT	STATUS
test_1_state_0	0	Illegal