Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6357256 |
1 |
|
|
T21 |
448 |
|
T22 |
355 |
|
T23 |
123 |
| auto[1] |
4264467 |
1 |
|
|
T26 |
461 |
|
T27 |
37876 |
|
T31 |
26808 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8806772 |
1 |
|
|
T21 |
448 |
|
T22 |
355 |
|
T23 |
123 |
| auto[1] |
1814951 |
1 |
|
|
T26 |
328 |
|
T27 |
15134 |
|
T31 |
15528 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6391255 |
1 |
|
|
T21 |
448 |
|
T22 |
355 |
|
T23 |
123 |
| auto[1] |
4230468 |
1 |
|
|
T26 |
587 |
|
T27 |
39578 |
|
T31 |
26542 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1215026 |
1 |
|
|
T26 |
119 |
|
T27 |
11966 |
|
T31 |
5328 |
| auto[1] |
auto[0] |
auto[1] |
915692 |
1 |
|
|
T26 |
168 |
|
T27 |
7735 |
|
T31 |
7862 |
| auto[1] |
auto[1] |
auto[0] |
1200491 |
1 |
|
|
T26 |
140 |
|
T27 |
12478 |
|
T31 |
5686 |
| auto[1] |
auto[1] |
auto[1] |
899259 |
1 |
|
|
T26 |
160 |
|
T27 |
7399 |
|
T31 |
7666 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |