cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55434 |
1 |
|
|
T16 |
341 |
|
T17 |
1530 |
|
T18 |
791 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44766 |
1 |
|
|
T16 |
259 |
|
T17 |
1271 |
|
T18 |
585 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56519 |
1 |
|
|
T16 |
967 |
|
T17 |
2773 |
|
T18 |
1655 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43510 |
1 |
|
|
T16 |
347 |
|
T17 |
913 |
|
T18 |
601 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1661 |
1 |
|
|
T16 |
12 |
|
T17 |
54 |
|
T18 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T16 |
15 |
|
T17 |
47 |
|
T18 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T16 |
12 |
|
T17 |
54 |
|
T18 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T16 |
15 |
|
T17 |
45 |
|
T18 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T16 |
12 |
|
T17 |
52 |
|
T18 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T16 |
15 |
|
T17 |
43 |
|
T18 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T16 |
12 |
|
T17 |
48 |
|
T18 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T16 |
15 |
|
T17 |
41 |
|
T18 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T16 |
11 |
|
T17 |
48 |
|
T18 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T16 |
15 |
|
T17 |
41 |
|
T18 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T16 |
11 |
|
T17 |
48 |
|
T18 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
13 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T16 |
14 |
|
T17 |
39 |
|
T18 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T16 |
11 |
|
T17 |
48 |
|
T18 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T16 |
13 |
|
T17 |
37 |
|
T18 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T16 |
11 |
|
T17 |
48 |
|
T18 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T16 |
13 |
|
T17 |
34 |
|
T18 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T16 |
11 |
|
T17 |
48 |
|
T18 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T16 |
5 |
|
T17 |
28 |
|
T18 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T16 |
13 |
|
T17 |
35 |
|
T18 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T16 |
10 |
|
T17 |
48 |
|
T18 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T16 |
5 |
|
T17 |
28 |
|
T18 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T16 |
13 |
|
T17 |
33 |
|
T18 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T16 |
10 |
|
T17 |
48 |
|
T18 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T16 |
5 |
|
T17 |
28 |
|
T18 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T16 |
12 |
|
T17 |
32 |
|
T18 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T16 |
10 |
|
T17 |
48 |
|
T18 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T16 |
5 |
|
T17 |
28 |
|
T18 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T16 |
12 |
|
T17 |
30 |
|
T18 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T16 |
10 |
|
T17 |
48 |
|
T18 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T16 |
5 |
|
T17 |
28 |
|
T18 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T16 |
12 |
|
T17 |
29 |
|
T18 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T16 |
10 |
|
T17 |
47 |
|
T18 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T16 |
5 |
|
T17 |
28 |
|
T18 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T16 |
12 |
|
T17 |
28 |
|
T18 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T16 |
10 |
|
T17 |
45 |
|
T18 |
20 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T16 |
5 |
|
T17 |
28 |
|
T18 |
12 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1151 |
1 |
|
|
T16 |
11 |
|
T17 |
27 |
|
T18 |
23 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59329 |
1 |
|
|
T16 |
396 |
|
T17 |
1963 |
|
T18 |
587 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45106 |
1 |
|
|
T16 |
263 |
|
T17 |
810 |
|
T18 |
1677 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51143 |
1 |
|
|
T16 |
494 |
|
T17 |
1842 |
|
T18 |
725 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45837 |
1 |
|
|
T16 |
890 |
|
T17 |
1911 |
|
T18 |
679 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T16 |
6 |
|
T17 |
29 |
|
T18 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T16 |
11 |
|
T17 |
41 |
|
T18 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T16 |
12 |
|
T17 |
42 |
|
T18 |
29 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T16 |
6 |
|
T17 |
29 |
|
T18 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T16 |
11 |
|
T17 |
41 |
|
T18 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T16 |
11 |
|
T17 |
40 |
|
T18 |
29 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T16 |
6 |
|
T17 |
29 |
|
T18 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T16 |
11 |
|
T17 |
41 |
|
T18 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T16 |
11 |
|
T17 |
40 |
|
T18 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T16 |
6 |
|
T17 |
29 |
|
T18 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T16 |
9 |
|
T17 |
40 |
|
T18 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T16 |
10 |
|
T17 |
39 |
|
T18 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T16 |
6 |
|
T17 |
29 |
|
T18 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T16 |
9 |
|
T17 |
37 |
|
T18 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T16 |
9 |
|
T17 |
38 |
|
T18 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T16 |
6 |
|
T17 |
29 |
|
T18 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T16 |
9 |
|
T17 |
37 |
|
T18 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T16 |
8 |
|
T17 |
38 |
|
T18 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T16 |
6 |
|
T17 |
29 |
|
T18 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T16 |
9 |
|
T17 |
37 |
|
T18 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T16 |
8 |
|
T17 |
37 |
|
T18 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T16 |
6 |
|
T17 |
29 |
|
T18 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T16 |
9 |
|
T17 |
37 |
|
T18 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T16 |
8 |
|
T17 |
37 |
|
T18 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T16 |
6 |
|
T17 |
29 |
|
T18 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T16 |
9 |
|
T17 |
37 |
|
T18 |
26 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T16 |
8 |
|
T17 |
37 |
|
T18 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T16 |
6 |
|
T17 |
29 |
|
T18 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T16 |
8 |
|
T17 |
36 |
|
T18 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T16 |
8 |
|
T17 |
37 |
|
T18 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T16 |
6 |
|
T17 |
29 |
|
T18 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T16 |
8 |
|
T17 |
35 |
|
T18 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T16 |
8 |
|
T17 |
37 |
|
T18 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T16 |
6 |
|
T17 |
29 |
|
T18 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T16 |
7 |
|
T17 |
35 |
|
T18 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T16 |
8 |
|
T17 |
35 |
|
T18 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T16 |
6 |
|
T17 |
29 |
|
T18 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T16 |
7 |
|
T17 |
33 |
|
T18 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T16 |
8 |
|
T17 |
33 |
|
T18 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T16 |
6 |
|
T17 |
29 |
|
T18 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1218 |
1 |
|
|
T16 |
7 |
|
T17 |
33 |
|
T18 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T16 |
8 |
|
T17 |
33 |
|
T18 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T16 |
6 |
|
T17 |
29 |
|
T18 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T16 |
7 |
|
T17 |
32 |
|
T18 |
23 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T16 |
5 |
|
T17 |
29 |
|
T18 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T16 |
8 |
|
T17 |
32 |
|
T18 |
20 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58833 |
1 |
|
|
T16 |
409 |
|
T17 |
1854 |
|
T18 |
1624 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43429 |
1 |
|
|
T16 |
181 |
|
T17 |
2197 |
|
T18 |
731 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55034 |
1 |
|
|
T16 |
510 |
|
T17 |
1299 |
|
T18 |
450 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44470 |
1 |
|
|
T16 |
866 |
|
T17 |
1088 |
|
T18 |
792 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T16 |
14 |
|
T17 |
55 |
|
T18 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T16 |
6 |
|
T17 |
26 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T16 |
14 |
|
T17 |
51 |
|
T18 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T16 |
13 |
|
T17 |
53 |
|
T18 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T16 |
6 |
|
T17 |
26 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T16 |
14 |
|
T17 |
51 |
|
T18 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T16 |
12 |
|
T17 |
51 |
|
T18 |
34 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T16 |
6 |
|
T17 |
26 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T16 |
14 |
|
T17 |
50 |
|
T18 |
34 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T16 |
11 |
|
T17 |
51 |
|
T18 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T16 |
6 |
|
T17 |
26 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T16 |
14 |
|
T17 |
49 |
|
T18 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T16 |
11 |
|
T17 |
50 |
|
T18 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T16 |
6 |
|
T17 |
26 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T16 |
14 |
|
T17 |
48 |
|
T18 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T16 |
11 |
|
T17 |
50 |
|
T18 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T16 |
6 |
|
T17 |
26 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T16 |
11 |
|
T17 |
47 |
|
T18 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T16 |
11 |
|
T17 |
49 |
|
T18 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T16 |
6 |
|
T17 |
26 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T16 |
11 |
|
T17 |
46 |
|
T18 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T16 |
10 |
|
T17 |
44 |
|
T18 |
30 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T16 |
6 |
|
T17 |
26 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T16 |
11 |
|
T17 |
44 |
|
T18 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T16 |
10 |
|
T17 |
43 |
|
T18 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T16 |
11 |
|
T17 |
44 |
|
T18 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T16 |
9 |
|
T17 |
41 |
|
T18 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T16 |
11 |
|
T17 |
44 |
|
T18 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T16 |
9 |
|
T17 |
39 |
|
T18 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T16 |
11 |
|
T17 |
43 |
|
T18 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T16 |
8 |
|
T17 |
39 |
|
T18 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T16 |
11 |
|
T17 |
42 |
|
T18 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T16 |
8 |
|
T17 |
37 |
|
T18 |
26 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1204 |
1 |
|
|
T16 |
11 |
|
T17 |
41 |
|
T18 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T16 |
8 |
|
T17 |
37 |
|
T18 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1174 |
1 |
|
|
T16 |
11 |
|
T17 |
39 |
|
T18 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1182 |
1 |
|
|
T16 |
8 |
|
T17 |
36 |
|
T18 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1148 |
1 |
|
|
T16 |
11 |
|
T17 |
38 |
|
T18 |
22 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53906 |
1 |
|
|
T16 |
253 |
|
T17 |
2526 |
|
T18 |
526 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39395 |
1 |
|
|
T16 |
270 |
|
T17 |
1451 |
|
T18 |
665 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62416 |
1 |
|
|
T16 |
253 |
|
T17 |
1184 |
|
T18 |
1683 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46458 |
1 |
|
|
T16 |
1074 |
|
T17 |
1175 |
|
T18 |
657 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T16 |
5 |
|
T17 |
19 |
|
T18 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T16 |
18 |
|
T17 |
62 |
|
T18 |
39 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T16 |
20 |
|
T17 |
60 |
|
T18 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T16 |
5 |
|
T17 |
19 |
|
T18 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T16 |
18 |
|
T17 |
62 |
|
T18 |
39 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T16 |
20 |
|
T17 |
58 |
|
T18 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T16 |
5 |
|
T17 |
19 |
|
T18 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T16 |
18 |
|
T17 |
61 |
|
T18 |
37 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T16 |
20 |
|
T17 |
58 |
|
T18 |
33 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T16 |
5 |
|
T17 |
19 |
|
T18 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T16 |
18 |
|
T17 |
60 |
|
T18 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T16 |
20 |
|
T17 |
57 |
|
T18 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T16 |
5 |
|
T17 |
19 |
|
T18 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T16 |
18 |
|
T17 |
60 |
|
T18 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T16 |
19 |
|
T17 |
55 |
|
T18 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T16 |
5 |
|
T17 |
19 |
|
T18 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T16 |
16 |
|
T17 |
58 |
|
T18 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T16 |
19 |
|
T17 |
55 |
|
T18 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T16 |
5 |
|
T17 |
19 |
|
T18 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T16 |
16 |
|
T17 |
57 |
|
T18 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T16 |
19 |
|
T17 |
52 |
|
T18 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T16 |
5 |
|
T17 |
19 |
|
T18 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T16 |
15 |
|
T17 |
55 |
|
T18 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T16 |
19 |
|
T17 |
51 |
|
T18 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T16 |
5 |
|
T17 |
19 |
|
T18 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T16 |
13 |
|
T17 |
53 |
|
T18 |
30 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T16 |
3 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T16 |
19 |
|
T17 |
50 |
|
T18 |
31 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T16 |
5 |
|
T17 |
19 |
|
T18 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T16 |
13 |
|
T17 |
51 |
|
T18 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T16 |
3 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T16 |
19 |
|
T17 |
47 |
|
T18 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T16 |
5 |
|
T17 |
19 |
|
T18 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T16 |
13 |
|
T17 |
49 |
|
T18 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T16 |
3 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T16 |
19 |
|
T17 |
46 |
|
T18 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T16 |
5 |
|
T17 |
19 |
|
T18 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T16 |
12 |
|
T17 |
49 |
|
T18 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T16 |
3 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T16 |
18 |
|
T17 |
44 |
|
T18 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T16 |
5 |
|
T17 |
19 |
|
T18 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T16 |
11 |
|
T17 |
49 |
|
T18 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T16 |
3 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T16 |
17 |
|
T17 |
42 |
|
T18 |
29 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T16 |
5 |
|
T17 |
19 |
|
T18 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1198 |
1 |
|
|
T16 |
11 |
|
T17 |
48 |
|
T18 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T16 |
3 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T16 |
17 |
|
T17 |
40 |
|
T18 |
28 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T16 |
5 |
|
T17 |
19 |
|
T18 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1173 |
1 |
|
|
T16 |
10 |
|
T17 |
47 |
|
T18 |
26 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T16 |
3 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1162 |
1 |
|
|
T16 |
17 |
|
T17 |
38 |
|
T18 |
28 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56126 |
1 |
|
|
T16 |
493 |
|
T17 |
2717 |
|
T18 |
655 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43434 |
1 |
|
|
T16 |
239 |
|
T17 |
872 |
|
T18 |
1609 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55226 |
1 |
|
|
T16 |
1135 |
|
T17 |
1351 |
|
T18 |
795 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45978 |
1 |
|
|
T16 |
152 |
|
T17 |
1451 |
|
T18 |
604 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T16 |
10 |
|
T17 |
53 |
|
T18 |
32 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T16 |
9 |
|
T17 |
23 |
|
T18 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T16 |
7 |
|
T17 |
54 |
|
T18 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T16 |
10 |
|
T17 |
52 |
|
T18 |
32 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T16 |
9 |
|
T17 |
23 |
|
T18 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T16 |
7 |
|
T17 |
53 |
|
T18 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T16 |
10 |
|
T17 |
51 |
|
T18 |
32 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T16 |
9 |
|
T17 |
23 |
|
T18 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T16 |
7 |
|
T17 |
53 |
|
T18 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T16 |
10 |
|
T17 |
50 |
|
T18 |
31 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T16 |
9 |
|
T17 |
23 |
|
T18 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T16 |
7 |
|
T17 |
53 |
|
T18 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T16 |
10 |
|
T17 |
48 |
|
T18 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T16 |
9 |
|
T17 |
23 |
|
T18 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T16 |
7 |
|
T17 |
52 |
|
T18 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T16 |
10 |
|
T17 |
48 |
|
T18 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T16 |
9 |
|
T17 |
23 |
|
T18 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T16 |
7 |
|
T17 |
51 |
|
T18 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T16 |
9 |
|
T17 |
47 |
|
T18 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T16 |
9 |
|
T17 |
23 |
|
T18 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T16 |
7 |
|
T17 |
51 |
|
T18 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T16 |
8 |
|
T17 |
47 |
|
T18 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T16 |
9 |
|
T17 |
23 |
|
T18 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T16 |
7 |
|
T17 |
50 |
|
T18 |
23 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T16 |
8 |
|
T17 |
47 |
|
T18 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T16 |
9 |
|
T17 |
23 |
|
T18 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T16 |
7 |
|
T17 |
48 |
|
T18 |
22 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T16 |
8 |
|
T17 |
44 |
|
T18 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T16 |
9 |
|
T17 |
23 |
|
T18 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T16 |
7 |
|
T17 |
47 |
|
T18 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T16 |
7 |
|
T17 |
42 |
|
T18 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T16 |
9 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T16 |
6 |
|
T17 |
46 |
|
T18 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T16 |
7 |
|
T17 |
39 |
|
T18 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T16 |
9 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T16 |
6 |
|
T17 |
44 |
|
T18 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T16 |
7 |
|
T17 |
38 |
|
T18 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T16 |
9 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T16 |
6 |
|
T17 |
43 |
|
T18 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T16 |
7 |
|
T17 |
37 |
|
T18 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T16 |
9 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T16 |
6 |
|
T17 |
43 |
|
T18 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T16 |
7 |
|
T17 |
34 |
|
T18 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T16 |
9 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T16 |
6 |
|
T17 |
42 |
|
T18 |
19 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58166 |
1 |
|
|
T16 |
567 |
|
T17 |
1626 |
|
T18 |
1614 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40746 |
1 |
|
|
T16 |
320 |
|
T17 |
1252 |
|
T18 |
537 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56390 |
1 |
|
|
T16 |
844 |
|
T17 |
2567 |
|
T18 |
830 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47039 |
1 |
|
|
T16 |
251 |
|
T17 |
1114 |
|
T18 |
776 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T16 |
13 |
|
T17 |
51 |
|
T18 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T16 |
5 |
|
T17 |
18 |
|
T18 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T16 |
14 |
|
T17 |
55 |
|
T18 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T16 |
13 |
|
T17 |
50 |
|
T18 |
23 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T16 |
5 |
|
T17 |
18 |
|
T18 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T16 |
13 |
|
T17 |
53 |
|
T18 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T16 |
13 |
|
T17 |
47 |
|
T18 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T16 |
5 |
|
T17 |
18 |
|
T18 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T16 |
13 |
|
T17 |
53 |
|
T18 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T16 |
13 |
|
T17 |
46 |
|
T18 |
22 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T16 |
5 |
|
T17 |
18 |
|
T18 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T16 |
12 |
|
T17 |
52 |
|
T18 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T16 |
13 |
|
T17 |
44 |
|
T18 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T16 |
5 |
|
T17 |
18 |
|
T18 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T16 |
12 |
|
T17 |
52 |
|
T18 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T16 |
13 |
|
T17 |
43 |
|
T18 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T16 |
5 |
|
T17 |
18 |
|
T18 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T16 |
11 |
|
T17 |
50 |
|
T18 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T16 |
12 |
|
T17 |
42 |
|
T18 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T16 |
5 |
|
T17 |
18 |
|
T18 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T16 |
11 |
|
T17 |
49 |
|
T18 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T16 |
12 |
|
T17 |
40 |
|
T18 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T16 |
5 |
|
T17 |
18 |
|
T18 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T16 |
11 |
|
T17 |
48 |
|
T18 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T16 |
11 |
|
T17 |
40 |
|
T18 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T16 |
5 |
|
T17 |
17 |
|
T18 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T16 |
11 |
|
T17 |
49 |
|
T18 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T16 |
10 |
|
T17 |
40 |
|
T18 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T16 |
5 |
|
T17 |
17 |
|
T18 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T16 |
10 |
|
T17 |
49 |
|
T18 |
20 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T16 |
10 |
|
T17 |
39 |
|
T18 |
17 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T16 |
5 |
|
T17 |
17 |
|
T18 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T16 |
10 |
|
T17 |
48 |
|
T18 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T16 |
10 |
|
T17 |
36 |
|
T18 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T16 |
5 |
|
T17 |
17 |
|
T18 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T16 |
10 |
|
T17 |
48 |
|
T18 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T16 |
10 |
|
T17 |
36 |
|
T18 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T16 |
5 |
|
T17 |
17 |
|
T18 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T16 |
9 |
|
T17 |
47 |
|
T18 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T16 |
9 |
|
T17 |
36 |
|
T18 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T16 |
5 |
|
T17 |
17 |
|
T18 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1189 |
1 |
|
|
T16 |
9 |
|
T17 |
46 |
|
T18 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1155 |
1 |
|
|
T16 |
9 |
|
T17 |
34 |
|
T18 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T16 |
5 |
|
T17 |
17 |
|
T18 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1160 |
1 |
|
|
T16 |
9 |
|
T17 |
43 |
|
T18 |
19 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60907 |
1 |
|
|
T16 |
364 |
|
T17 |
1872 |
|
T18 |
627 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40181 |
1 |
|
|
T16 |
349 |
|
T17 |
988 |
|
T18 |
775 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58516 |
1 |
|
|
T16 |
298 |
|
T17 |
1648 |
|
T18 |
1807 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41808 |
1 |
|
|
T16 |
907 |
|
T17 |
2018 |
|
T18 |
599 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T16 |
3 |
|
T17 |
24 |
|
T18 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T16 |
18 |
|
T17 |
50 |
|
T18 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1616 |
1 |
|
|
T16 |
17 |
|
T17 |
47 |
|
T18 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T16 |
3 |
|
T17 |
24 |
|
T18 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T16 |
18 |
|
T17 |
48 |
|
T18 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1586 |
1 |
|
|
T16 |
16 |
|
T17 |
46 |
|
T18 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T16 |
3 |
|
T17 |
24 |
|
T18 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T16 |
18 |
|
T17 |
46 |
|
T18 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T16 |
15 |
|
T17 |
45 |
|
T18 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T16 |
3 |
|
T17 |
24 |
|
T18 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T16 |
18 |
|
T17 |
45 |
|
T18 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T16 |
15 |
|
T17 |
45 |
|
T18 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T16 |
2 |
|
T17 |
24 |
|
T18 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T16 |
19 |
|
T17 |
45 |
|
T18 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T16 |
15 |
|
T17 |
44 |
|
T18 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T16 |
2 |
|
T17 |
24 |
|
T18 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T16 |
19 |
|
T17 |
42 |
|
T18 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T16 |
15 |
|
T17 |
42 |
|
T18 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T16 |
2 |
|
T17 |
24 |
|
T18 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T16 |
19 |
|
T17 |
40 |
|
T18 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T16 |
15 |
|
T17 |
40 |
|
T18 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T16 |
2 |
|
T17 |
24 |
|
T18 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T16 |
18 |
|
T17 |
39 |
|
T18 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T16 |
15 |
|
T17 |
40 |
|
T18 |
17 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T16 |
2 |
|
T17 |
24 |
|
T18 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T16 |
17 |
|
T17 |
38 |
|
T18 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T16 |
14 |
|
T17 |
40 |
|
T18 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T16 |
2 |
|
T17 |
24 |
|
T18 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T16 |
17 |
|
T17 |
37 |
|
T18 |
26 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T16 |
13 |
|
T17 |
38 |
|
T18 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T16 |
2 |
|
T17 |
24 |
|
T18 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T16 |
16 |
|
T17 |
36 |
|
T18 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T16 |
13 |
|
T17 |
35 |
|
T18 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T16 |
2 |
|
T17 |
24 |
|
T18 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T16 |
13 |
|
T17 |
35 |
|
T18 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T16 |
13 |
|
T17 |
35 |
|
T18 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T16 |
2 |
|
T17 |
24 |
|
T18 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T16 |
12 |
|
T17 |
34 |
|
T18 |
25 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T16 |
4 |
|
T17 |
27 |
|
T18 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T16 |
13 |
|
T17 |
35 |
|
T18 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T16 |
2 |
|
T17 |
24 |
|
T18 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T16 |
12 |
|
T17 |
33 |
|
T18 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T16 |
4 |
|
T17 |
27 |
|
T18 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T16 |
13 |
|
T17 |
34 |
|
T18 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T16 |
2 |
|
T17 |
24 |
|
T18 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1175 |
1 |
|
|
T16 |
12 |
|
T17 |
32 |
|
T18 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T16 |
4 |
|
T17 |
27 |
|
T18 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1149 |
1 |
|
|
T16 |
12 |
|
T17 |
34 |
|
T18 |
14 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59209 |
1 |
|
|
T16 |
651 |
|
T17 |
1237 |
|
T18 |
611 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42996 |
1 |
|
|
T16 |
164 |
|
T17 |
1244 |
|
T18 |
761 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56272 |
1 |
|
|
T16 |
335 |
|
T17 |
1526 |
|
T18 |
706 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43856 |
1 |
|
|
T16 |
908 |
|
T17 |
2438 |
|
T18 |
1668 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T16 |
9 |
|
T17 |
22 |
|
T18 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T16 |
7 |
|
T17 |
50 |
|
T18 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1586 |
1 |
|
|
T16 |
9 |
|
T17 |
48 |
|
T18 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T16 |
9 |
|
T17 |
22 |
|
T18 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T16 |
6 |
|
T17 |
50 |
|
T18 |
30 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T16 |
8 |
|
T17 |
48 |
|
T18 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T16 |
9 |
|
T17 |
22 |
|
T18 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T16 |
6 |
|
T17 |
50 |
|
T18 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T16 |
8 |
|
T17 |
46 |
|
T18 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T16 |
9 |
|
T17 |
22 |
|
T18 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T16 |
6 |
|
T17 |
49 |
|
T18 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T16 |
8 |
|
T17 |
46 |
|
T18 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T16 |
8 |
|
T17 |
22 |
|
T18 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T16 |
7 |
|
T17 |
48 |
|
T18 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T16 |
8 |
|
T17 |
44 |
|
T18 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T16 |
8 |
|
T17 |
22 |
|
T18 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T16 |
6 |
|
T17 |
48 |
|
T18 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T16 |
7 |
|
T17 |
44 |
|
T18 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T16 |
8 |
|
T17 |
22 |
|
T18 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T16 |
6 |
|
T17 |
48 |
|
T18 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T16 |
6 |
|
T17 |
44 |
|
T18 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T16 |
8 |
|
T17 |
22 |
|
T18 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T16 |
6 |
|
T17 |
48 |
|
T18 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T16 |
6 |
|
T17 |
43 |
|
T18 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T16 |
8 |
|
T17 |
22 |
|
T18 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T16 |
5 |
|
T17 |
48 |
|
T18 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T16 |
6 |
|
T17 |
44 |
|
T18 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T16 |
8 |
|
T17 |
22 |
|
T18 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T16 |
5 |
|
T17 |
48 |
|
T18 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T16 |
6 |
|
T17 |
43 |
|
T18 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T16 |
8 |
|
T17 |
22 |
|
T18 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T16 |
5 |
|
T17 |
48 |
|
T18 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T16 |
6 |
|
T17 |
43 |
|
T18 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T16 |
8 |
|
T17 |
22 |
|
T18 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T16 |
5 |
|
T17 |
45 |
|
T18 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T16 |
6 |
|
T17 |
41 |
|
T18 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T16 |
8 |
|
T17 |
22 |
|
T18 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T16 |
5 |
|
T17 |
44 |
|
T18 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T16 |
6 |
|
T17 |
41 |
|
T18 |
24 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T16 |
8 |
|
T17 |
22 |
|
T18 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T16 |
5 |
|
T17 |
43 |
|
T18 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1178 |
1 |
|
|
T16 |
5 |
|
T17 |
38 |
|
T18 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T16 |
8 |
|
T17 |
22 |
|
T18 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1197 |
1 |
|
|
T16 |
5 |
|
T17 |
42 |
|
T18 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1148 |
1 |
|
|
T16 |
5 |
|
T17 |
38 |
|
T18 |
23 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57332 |
1 |
|
|
T16 |
1025 |
|
T17 |
2281 |
|
T18 |
563 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45480 |
1 |
|
|
T16 |
261 |
|
T17 |
1105 |
|
T18 |
679 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53265 |
1 |
|
|
T16 |
223 |
|
T17 |
1723 |
|
T18 |
929 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45929 |
1 |
|
|
T16 |
402 |
|
T17 |
1254 |
|
T18 |
1575 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T16 |
13 |
|
T17 |
56 |
|
T18 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T16 |
12 |
|
T17 |
59 |
|
T18 |
33 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T16 |
13 |
|
T17 |
55 |
|
T18 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T16 |
12 |
|
T17 |
57 |
|
T18 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T16 |
13 |
|
T17 |
54 |
|
T18 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T16 |
12 |
|
T17 |
57 |
|
T18 |
31 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T16 |
13 |
|
T17 |
52 |
|
T18 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T16 |
12 |
|
T17 |
56 |
|
T18 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T16 |
12 |
|
T17 |
51 |
|
T18 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T16 |
12 |
|
T17 |
53 |
|
T18 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T16 |
12 |
|
T17 |
48 |
|
T18 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T16 |
12 |
|
T17 |
52 |
|
T18 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T16 |
12 |
|
T17 |
47 |
|
T18 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T16 |
11 |
|
T17 |
52 |
|
T18 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T16 |
12 |
|
T17 |
47 |
|
T18 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T16 |
11 |
|
T17 |
52 |
|
T18 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T16 |
12 |
|
T17 |
46 |
|
T18 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T16 |
11 |
|
T17 |
52 |
|
T18 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T16 |
12 |
|
T17 |
43 |
|
T18 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T16 |
11 |
|
T17 |
50 |
|
T18 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T16 |
12 |
|
T17 |
43 |
|
T18 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T16 |
11 |
|
T17 |
48 |
|
T18 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T16 |
12 |
|
T17 |
42 |
|
T18 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T16 |
11 |
|
T17 |
45 |
|
T18 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T16 |
12 |
|
T17 |
40 |
|
T18 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T16 |
10 |
|
T17 |
45 |
|
T18 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T16 |
12 |
|
T17 |
37 |
|
T18 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T16 |
10 |
|
T17 |
45 |
|
T18 |
21 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1166 |
1 |
|
|
T16 |
11 |
|
T17 |
36 |
|
T18 |
20 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1144 |
1 |
|
|
T16 |
10 |
|
T17 |
45 |
|
T18 |
21 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52068 |
1 |
|
|
T16 |
332 |
|
T17 |
993 |
|
T18 |
396 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51936 |
1 |
|
|
T16 |
293 |
|
T17 |
2276 |
|
T18 |
478 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56209 |
1 |
|
|
T16 |
469 |
|
T17 |
1521 |
|
T18 |
1914 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41653 |
1 |
|
|
T16 |
865 |
|
T17 |
1455 |
|
T18 |
865 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T16 |
14 |
|
T17 |
61 |
|
T18 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T16 |
8 |
|
T17 |
26 |
|
T18 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1593 |
1 |
|
|
T16 |
12 |
|
T17 |
57 |
|
T18 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T16 |
13 |
|
T17 |
60 |
|
T18 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T16 |
8 |
|
T17 |
26 |
|
T18 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T16 |
12 |
|
T17 |
56 |
|
T18 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T16 |
12 |
|
T17 |
60 |
|
T18 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T16 |
8 |
|
T17 |
26 |
|
T18 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T16 |
12 |
|
T17 |
56 |
|
T18 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T16 |
12 |
|
T17 |
58 |
|
T18 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T16 |
8 |
|
T17 |
26 |
|
T18 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T16 |
11 |
|
T17 |
55 |
|
T18 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T16 |
11 |
|
T17 |
54 |
|
T18 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T16 |
8 |
|
T17 |
26 |
|
T18 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T16 |
10 |
|
T17 |
52 |
|
T18 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T16 |
11 |
|
T17 |
53 |
|
T18 |
26 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T16 |
8 |
|
T17 |
26 |
|
T18 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T16 |
10 |
|
T17 |
49 |
|
T18 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T16 |
11 |
|
T17 |
51 |
|
T18 |
26 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T16 |
8 |
|
T17 |
26 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T16 |
10 |
|
T17 |
49 |
|
T18 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T16 |
11 |
|
T17 |
51 |
|
T18 |
24 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T16 |
8 |
|
T17 |
26 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T16 |
10 |
|
T17 |
49 |
|
T18 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T16 |
10 |
|
T17 |
51 |
|
T18 |
22 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T16 |
8 |
|
T17 |
26 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T16 |
9 |
|
T17 |
49 |
|
T18 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T16 |
10 |
|
T17 |
51 |
|
T18 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T16 |
8 |
|
T17 |
26 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T16 |
9 |
|
T17 |
49 |
|
T18 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T16 |
9 |
|
T17 |
49 |
|
T18 |
21 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T16 |
8 |
|
T17 |
26 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T16 |
9 |
|
T17 |
49 |
|
T18 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T16 |
9 |
|
T17 |
47 |
|
T18 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T16 |
8 |
|
T17 |
26 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T16 |
9 |
|
T17 |
49 |
|
T18 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T16 |
9 |
|
T17 |
47 |
|
T18 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T16 |
8 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T16 |
9 |
|
T17 |
48 |
|
T18 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1218 |
1 |
|
|
T16 |
9 |
|
T17 |
45 |
|
T18 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T16 |
8 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T16 |
9 |
|
T17 |
46 |
|
T18 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T16 |
9 |
|
T17 |
45 |
|
T18 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T16 |
8 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1176 |
1 |
|
|
T16 |
9 |
|
T17 |
45 |
|
T18 |
26 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56605 |
1 |
|
|
T16 |
420 |
|
T17 |
2972 |
|
T18 |
678 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43999 |
1 |
|
|
T16 |
976 |
|
T17 |
856 |
|
T18 |
816 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54604 |
1 |
|
|
T16 |
304 |
|
T17 |
1563 |
|
T18 |
1451 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45125 |
1 |
|
|
T16 |
216 |
|
T17 |
1125 |
|
T18 |
680 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1691 |
1 |
|
|
T16 |
15 |
|
T17 |
49 |
|
T18 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T16 |
16 |
|
T17 |
43 |
|
T18 |
31 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1665 |
1 |
|
|
T16 |
15 |
|
T17 |
49 |
|
T18 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T16 |
16 |
|
T17 |
43 |
|
T18 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T16 |
15 |
|
T17 |
47 |
|
T18 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T16 |
16 |
|
T17 |
41 |
|
T18 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1590 |
1 |
|
|
T16 |
15 |
|
T17 |
47 |
|
T18 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T16 |
15 |
|
T17 |
41 |
|
T18 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T16 |
16 |
|
T17 |
47 |
|
T18 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T16 |
15 |
|
T17 |
41 |
|
T18 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T16 |
16 |
|
T17 |
46 |
|
T18 |
31 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T16 |
15 |
|
T17 |
41 |
|
T18 |
27 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T16 |
16 |
|
T17 |
44 |
|
T18 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T16 |
14 |
|
T17 |
41 |
|
T18 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T16 |
15 |
|
T17 |
44 |
|
T18 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T16 |
14 |
|
T17 |
41 |
|
T18 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T16 |
14 |
|
T17 |
44 |
|
T18 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T16 |
14 |
|
T17 |
40 |
|
T18 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T16 |
13 |
|
T17 |
42 |
|
T18 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T16 |
13 |
|
T17 |
39 |
|
T18 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T16 |
13 |
|
T17 |
42 |
|
T18 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T16 |
13 |
|
T17 |
38 |
|
T18 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T16 |
13 |
|
T17 |
40 |
|
T18 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T16 |
4 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T16 |
11 |
|
T17 |
37 |
|
T18 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T16 |
13 |
|
T17 |
39 |
|
T18 |
27 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T16 |
4 |
|
T17 |
27 |
|
T18 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T16 |
10 |
|
T17 |
36 |
|
T18 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T16 |
13 |
|
T17 |
37 |
|
T18 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T16 |
4 |
|
T17 |
27 |
|
T18 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T16 |
10 |
|
T17 |
34 |
|
T18 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T16 |
13 |
|
T17 |
35 |
|
T18 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T16 |
4 |
|
T17 |
27 |
|
T18 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T16 |
10 |
|
T17 |
32 |
|
T18 |
22 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59420 |
1 |
|
|
T16 |
54 |
|
T17 |
1924 |
|
T18 |
582 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47243 |
1 |
|
|
T16 |
421 |
|
T17 |
2421 |
|
T18 |
710 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52901 |
1 |
|
|
T16 |
557 |
|
T17 |
1079 |
|
T18 |
1914 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42303 |
1 |
|
|
T16 |
933 |
|
T17 |
988 |
|
T18 |
414 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T16 |
16 |
|
T17 |
53 |
|
T18 |
24 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T16 |
3 |
|
T17 |
25 |
|
T18 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T16 |
16 |
|
T17 |
51 |
|
T18 |
28 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T16 |
16 |
|
T17 |
52 |
|
T18 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T16 |
3 |
|
T17 |
25 |
|
T18 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T16 |
15 |
|
T17 |
51 |
|
T18 |
28 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T16 |
16 |
|
T17 |
52 |
|
T18 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T16 |
3 |
|
T17 |
25 |
|
T18 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T16 |
15 |
|
T17 |
49 |
|
T18 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T16 |
16 |
|
T17 |
49 |
|
T18 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T16 |
3 |
|
T17 |
25 |
|
T18 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T16 |
15 |
|
T17 |
47 |
|
T18 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T16 |
16 |
|
T17 |
47 |
|
T18 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T16 |
3 |
|
T17 |
25 |
|
T18 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T16 |
15 |
|
T17 |
47 |
|
T18 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T16 |
16 |
|
T17 |
46 |
|
T18 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T16 |
3 |
|
T17 |
25 |
|
T18 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T16 |
15 |
|
T17 |
47 |
|
T18 |
24 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T16 |
15 |
|
T17 |
46 |
|
T18 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T16 |
3 |
|
T17 |
25 |
|
T18 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T16 |
15 |
|
T17 |
47 |
|
T18 |
24 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T16 |
13 |
|
T17 |
46 |
|
T18 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T16 |
3 |
|
T17 |
25 |
|
T18 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T16 |
15 |
|
T17 |
46 |
|
T18 |
24 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T16 |
2 |
|
T17 |
23 |
|
T18 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T16 |
13 |
|
T17 |
45 |
|
T18 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T16 |
3 |
|
T17 |
24 |
|
T18 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T16 |
15 |
|
T17 |
46 |
|
T18 |
24 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T16 |
2 |
|
T17 |
23 |
|
T18 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T16 |
13 |
|
T17 |
45 |
|
T18 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T16 |
3 |
|
T17 |
24 |
|
T18 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T16 |
15 |
|
T17 |
43 |
|
T18 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T16 |
2 |
|
T17 |
23 |
|
T18 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T16 |
12 |
|
T17 |
45 |
|
T18 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T16 |
3 |
|
T17 |
24 |
|
T18 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T16 |
15 |
|
T17 |
43 |
|
T18 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T16 |
2 |
|
T17 |
23 |
|
T18 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T16 |
11 |
|
T17 |
45 |
|
T18 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T16 |
3 |
|
T17 |
24 |
|
T18 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T16 |
14 |
|
T17 |
41 |
|
T18 |
22 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T16 |
2 |
|
T17 |
23 |
|
T18 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T16 |
11 |
|
T17 |
44 |
|
T18 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T16 |
3 |
|
T17 |
24 |
|
T18 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T16 |
14 |
|
T17 |
41 |
|
T18 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T16 |
2 |
|
T17 |
23 |
|
T18 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T16 |
10 |
|
T17 |
44 |
|
T18 |
19 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T16 |
3 |
|
T17 |
24 |
|
T18 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1214 |
1 |
|
|
T16 |
13 |
|
T17 |
40 |
|
T18 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T16 |
2 |
|
T17 |
23 |
|
T18 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1171 |
1 |
|
|
T16 |
10 |
|
T17 |
43 |
|
T18 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T16 |
3 |
|
T17 |
24 |
|
T18 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T16 |
13 |
|
T17 |
37 |
|
T18 |
20 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56228 |
1 |
|
|
T16 |
406 |
|
T17 |
1648 |
|
T18 |
597 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46480 |
1 |
|
|
T16 |
908 |
|
T17 |
1242 |
|
T18 |
777 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52185 |
1 |
|
|
T16 |
456 |
|
T17 |
1535 |
|
T18 |
1720 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45209 |
1 |
|
|
T16 |
204 |
|
T17 |
2139 |
|
T18 |
612 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1704 |
1 |
|
|
T16 |
13 |
|
T17 |
50 |
|
T18 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1675 |
1 |
|
|
T16 |
11 |
|
T17 |
47 |
|
T18 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1671 |
1 |
|
|
T16 |
13 |
|
T17 |
48 |
|
T18 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T16 |
11 |
|
T17 |
46 |
|
T18 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T16 |
13 |
|
T17 |
47 |
|
T18 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T16 |
11 |
|
T17 |
46 |
|
T18 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T16 |
13 |
|
T17 |
45 |
|
T18 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T16 |
11 |
|
T17 |
46 |
|
T18 |
27 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T16 |
13 |
|
T17 |
45 |
|
T18 |
27 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T16 |
10 |
|
T17 |
44 |
|
T18 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T16 |
12 |
|
T17 |
45 |
|
T18 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T16 |
10 |
|
T17 |
44 |
|
T18 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T16 |
11 |
|
T17 |
42 |
|
T18 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T16 |
10 |
|
T17 |
44 |
|
T18 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T16 |
9 |
|
T17 |
42 |
|
T18 |
25 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T16 |
10 |
|
T17 |
43 |
|
T18 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T16 |
9 |
|
T17 |
39 |
|
T18 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T16 |
10 |
|
T17 |
42 |
|
T18 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T16 |
9 |
|
T17 |
39 |
|
T18 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T16 |
10 |
|
T17 |
42 |
|
T18 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T16 |
9 |
|
T17 |
38 |
|
T18 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T16 |
10 |
|
T17 |
38 |
|
T18 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T16 |
9 |
|
T17 |
37 |
|
T18 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T16 |
10 |
|
T17 |
38 |
|
T18 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T16 |
9 |
|
T17 |
36 |
|
T18 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T16 |
10 |
|
T17 |
38 |
|
T18 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T16 |
9 |
|
T17 |
34 |
|
T18 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T16 |
8 |
|
T17 |
37 |
|
T18 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1222 |
1 |
|
|
T16 |
9 |
|
T17 |
33 |
|
T18 |
22 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T16 |
8 |
|
T17 |
37 |
|
T18 |
20 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58456 |
1 |
|
|
T16 |
946 |
|
T17 |
2745 |
|
T18 |
1750 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42733 |
1 |
|
|
T16 |
258 |
|
T17 |
1010 |
|
T18 |
600 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51085 |
1 |
|
|
T16 |
311 |
|
T17 |
1903 |
|
T18 |
634 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49679 |
1 |
|
|
T16 |
369 |
|
T17 |
894 |
|
T18 |
742 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T16 |
5 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T16 |
18 |
|
T17 |
48 |
|
T18 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T16 |
4 |
|
T17 |
26 |
|
T18 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T16 |
18 |
|
T17 |
45 |
|
T18 |
31 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T16 |
5 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T16 |
18 |
|
T17 |
48 |
|
T18 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T16 |
4 |
|
T17 |
26 |
|
T18 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T16 |
18 |
|
T17 |
45 |
|
T18 |
31 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T16 |
5 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T16 |
16 |
|
T17 |
48 |
|
T18 |
32 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T16 |
4 |
|
T17 |
26 |
|
T18 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T16 |
18 |
|
T17 |
43 |
|
T18 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T16 |
5 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T16 |
16 |
|
T17 |
46 |
|
T18 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T16 |
4 |
|
T17 |
26 |
|
T18 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T16 |
16 |
|
T17 |
42 |
|
T18 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T16 |
5 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T16 |
16 |
|
T17 |
45 |
|
T18 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T16 |
4 |
|
T17 |
26 |
|
T18 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T16 |
16 |
|
T17 |
42 |
|
T18 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T16 |
5 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T16 |
16 |
|
T17 |
45 |
|
T18 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T16 |
4 |
|
T17 |
26 |
|
T18 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T16 |
16 |
|
T17 |
42 |
|
T18 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T16 |
5 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T16 |
15 |
|
T17 |
41 |
|
T18 |
29 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T16 |
4 |
|
T17 |
26 |
|
T18 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T16 |
16 |
|
T17 |
41 |
|
T18 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T16 |
5 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T16 |
15 |
|
T17 |
41 |
|
T18 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T16 |
4 |
|
T17 |
26 |
|
T18 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T16 |
16 |
|
T17 |
41 |
|
T18 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T16 |
4 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T16 |
14 |
|
T17 |
40 |
|
T18 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T16 |
4 |
|
T17 |
25 |
|
T18 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T16 |
16 |
|
T17 |
41 |
|
T18 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T16 |
4 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T16 |
13 |
|
T17 |
39 |
|
T18 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T16 |
4 |
|
T17 |
25 |
|
T18 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T16 |
16 |
|
T17 |
40 |
|
T18 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T16 |
4 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T16 |
13 |
|
T17 |
39 |
|
T18 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T16 |
4 |
|
T17 |
25 |
|
T18 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T16 |
16 |
|
T17 |
38 |
|
T18 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T16 |
4 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T16 |
13 |
|
T17 |
37 |
|
T18 |
25 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T16 |
4 |
|
T17 |
25 |
|
T18 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T16 |
15 |
|
T17 |
37 |
|
T18 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T16 |
4 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T16 |
13 |
|
T17 |
35 |
|
T18 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T16 |
4 |
|
T17 |
25 |
|
T18 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T16 |
15 |
|
T17 |
36 |
|
T18 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T16 |
4 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T16 |
13 |
|
T17 |
35 |
|
T18 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T16 |
4 |
|
T17 |
25 |
|
T18 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T16 |
15 |
|
T17 |
35 |
|
T18 |
23 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T16 |
4 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1159 |
1 |
|
|
T16 |
11 |
|
T17 |
34 |
|
T18 |
24 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T16 |
4 |
|
T17 |
25 |
|
T18 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1161 |
1 |
|
|
T16 |
13 |
|
T17 |
34 |
|
T18 |
21 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56610 |
1 |
|
|
T16 |
542 |
|
T17 |
2666 |
|
T18 |
800 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44736 |
1 |
|
|
T16 |
751 |
|
T17 |
1321 |
|
T18 |
1518 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54961 |
1 |
|
|
T16 |
458 |
|
T17 |
1501 |
|
T18 |
866 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45265 |
1 |
|
|
T16 |
229 |
|
T17 |
950 |
|
T18 |
499 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T16 |
8 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T16 |
10 |
|
T17 |
56 |
|
T18 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T16 |
10 |
|
T17 |
21 |
|
T18 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T16 |
7 |
|
T17 |
55 |
|
T18 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T16 |
8 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T16 |
10 |
|
T17 |
56 |
|
T18 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T16 |
10 |
|
T17 |
21 |
|
T18 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T16 |
7 |
|
T17 |
55 |
|
T18 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T16 |
8 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T16 |
10 |
|
T17 |
55 |
|
T18 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T16 |
10 |
|
T17 |
21 |
|
T18 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T16 |
7 |
|
T17 |
55 |
|
T18 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T16 |
8 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T16 |
10 |
|
T17 |
54 |
|
T18 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T16 |
10 |
|
T17 |
21 |
|
T18 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T16 |
7 |
|
T17 |
51 |
|
T18 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T16 |
8 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T16 |
10 |
|
T17 |
54 |
|
T18 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T16 |
10 |
|
T17 |
21 |
|
T18 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T16 |
7 |
|
T17 |
50 |
|
T18 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T16 |
8 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T16 |
9 |
|
T17 |
53 |
|
T18 |
26 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T16 |
10 |
|
T17 |
21 |
|
T18 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T16 |
7 |
|
T17 |
48 |
|
T18 |
23 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T16 |
8 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T16 |
9 |
|
T17 |
52 |
|
T18 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T16 |
10 |
|
T17 |
21 |
|
T18 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T16 |
7 |
|
T17 |
48 |
|
T18 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T16 |
8 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T16 |
8 |
|
T17 |
51 |
|
T18 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T16 |
10 |
|
T17 |
21 |
|
T18 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T16 |
7 |
|
T17 |
47 |
|
T18 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T16 |
7 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T16 |
8 |
|
T17 |
51 |
|
T18 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T16 |
10 |
|
T17 |
20 |
|
T18 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T16 |
7 |
|
T17 |
45 |
|
T18 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T16 |
7 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T16 |
8 |
|
T17 |
50 |
|
T18 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T16 |
10 |
|
T17 |
20 |
|
T18 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T16 |
7 |
|
T17 |
42 |
|
T18 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T16 |
7 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T16 |
8 |
|
T17 |
48 |
|
T18 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T16 |
10 |
|
T17 |
20 |
|
T18 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T16 |
7 |
|
T17 |
42 |
|
T18 |
18 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T16 |
7 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T16 |
7 |
|
T17 |
48 |
|
T18 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T16 |
10 |
|
T17 |
20 |
|
T18 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T16 |
7 |
|
T17 |
40 |
|
T18 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T16 |
7 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T16 |
6 |
|
T17 |
48 |
|
T18 |
21 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T16 |
10 |
|
T17 |
20 |
|
T18 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T16 |
7 |
|
T17 |
39 |
|
T18 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T16 |
7 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T16 |
6 |
|
T17 |
47 |
|
T18 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T16 |
10 |
|
T17 |
20 |
|
T18 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T16 |
7 |
|
T17 |
38 |
|
T18 |
17 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T16 |
7 |
|
T17 |
20 |
|
T18 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1172 |
1 |
|
|
T16 |
5 |
|
T17 |
47 |
|
T18 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T16 |
10 |
|
T17 |
20 |
|
T18 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1178 |
1 |
|
|
T16 |
7 |
|
T17 |
32 |
|
T18 |
17 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60981 |
1 |
|
|
T16 |
1094 |
|
T17 |
1265 |
|
T18 |
2019 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41253 |
1 |
|
|
T16 |
334 |
|
T17 |
2264 |
|
T18 |
587 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55555 |
1 |
|
|
T16 |
324 |
|
T17 |
2031 |
|
T18 |
594 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43769 |
1 |
|
|
T16 |
163 |
|
T17 |
1072 |
|
T18 |
518 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T16 |
8 |
|
T17 |
18 |
|
T18 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T16 |
13 |
|
T17 |
52 |
|
T18 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T16 |
12 |
|
T17 |
49 |
|
T18 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T16 |
8 |
|
T17 |
18 |
|
T18 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T16 |
13 |
|
T17 |
51 |
|
T18 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T16 |
11 |
|
T17 |
49 |
|
T18 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T16 |
8 |
|
T17 |
18 |
|
T18 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T16 |
13 |
|
T17 |
49 |
|
T18 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T16 |
11 |
|
T17 |
46 |
|
T18 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T16 |
8 |
|
T17 |
18 |
|
T18 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T16 |
13 |
|
T17 |
48 |
|
T18 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T16 |
11 |
|
T17 |
46 |
|
T18 |
22 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T16 |
8 |
|
T17 |
18 |
|
T18 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T16 |
13 |
|
T17 |
47 |
|
T18 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T16 |
11 |
|
T17 |
46 |
|
T18 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T16 |
8 |
|
T17 |
18 |
|
T18 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T16 |
13 |
|
T17 |
46 |
|
T18 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T16 |
10 |
|
T17 |
46 |
|
T18 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T16 |
8 |
|
T17 |
18 |
|
T18 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T16 |
13 |
|
T17 |
45 |
|
T18 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T16 |
10 |
|
T17 |
46 |
|
T18 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T16 |
8 |
|
T17 |
18 |
|
T18 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T16 |
11 |
|
T17 |
43 |
|
T18 |
26 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T16 |
9 |
|
T17 |
43 |
|
T18 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T16 |
8 |
|
T17 |
18 |
|
T18 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T16 |
11 |
|
T17 |
42 |
|
T18 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T16 |
9 |
|
T17 |
41 |
|
T18 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T16 |
8 |
|
T17 |
18 |
|
T18 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T16 |
10 |
|
T17 |
40 |
|
T18 |
24 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T16 |
9 |
|
T17 |
39 |
|
T18 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T16 |
8 |
|
T17 |
18 |
|
T18 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T16 |
10 |
|
T17 |
38 |
|
T18 |
23 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T16 |
9 |
|
T17 |
38 |
|
T18 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T16 |
8 |
|
T17 |
18 |
|
T18 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T16 |
10 |
|
T17 |
37 |
|
T18 |
22 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T16 |
9 |
|
T17 |
38 |
|
T18 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T16 |
8 |
|
T17 |
18 |
|
T18 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1190 |
1 |
|
|
T16 |
10 |
|
T17 |
37 |
|
T18 |
22 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T16 |
9 |
|
T17 |
38 |
|
T18 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T16 |
8 |
|
T17 |
18 |
|
T18 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1153 |
1 |
|
|
T16 |
10 |
|
T17 |
37 |
|
T18 |
20 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T16 |
7 |
|
T17 |
37 |
|
T18 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T16 |
8 |
|
T17 |
18 |
|
T18 |
10 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1123 |
1 |
|
|
T16 |
10 |
|
T17 |
36 |
|
T18 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T16 |
8 |
|
T17 |
21 |
|
T18 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T16 |
7 |
|
T17 |
36 |
|
T18 |
19 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52852 |
1 |
|
|
T16 |
372 |
|
T17 |
1145 |
|
T18 |
1896 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46238 |
1 |
|
|
T16 |
275 |
|
T17 |
1136 |
|
T18 |
585 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52586 |
1 |
|
|
T16 |
609 |
|
T17 |
1830 |
|
T18 |
657 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48431 |
1 |
|
|
T16 |
803 |
|
T17 |
2344 |
|
T18 |
616 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T16 |
9 |
|
T17 |
54 |
|
T18 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1656 |
1 |
|
|
T16 |
8 |
|
T17 |
53 |
|
T18 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1639 |
1 |
|
|
T16 |
9 |
|
T17 |
50 |
|
T18 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T16 |
7 |
|
T17 |
52 |
|
T18 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T16 |
9 |
|
T17 |
50 |
|
T18 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T16 |
7 |
|
T17 |
52 |
|
T18 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T16 |
9 |
|
T17 |
49 |
|
T18 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T16 |
7 |
|
T17 |
52 |
|
T18 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T16 |
8 |
|
T17 |
48 |
|
T18 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T16 |
7 |
|
T17 |
50 |
|
T18 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T16 |
8 |
|
T17 |
48 |
|
T18 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T16 |
7 |
|
T17 |
50 |
|
T18 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T16 |
8 |
|
T17 |
47 |
|
T18 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T16 |
7 |
|
T17 |
48 |
|
T18 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T16 |
8 |
|
T17 |
45 |
|
T18 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T16 |
7 |
|
T17 |
47 |
|
T18 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T16 |
8 |
|
T17 |
44 |
|
T18 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T16 |
7 |
|
T17 |
47 |
|
T18 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T16 |
8 |
|
T17 |
43 |
|
T18 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T16 |
7 |
|
T17 |
45 |
|
T18 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T16 |
8 |
|
T17 |
42 |
|
T18 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T16 |
7 |
|
T17 |
45 |
|
T18 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T16 |
8 |
|
T17 |
40 |
|
T18 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T16 |
7 |
|
T17 |
44 |
|
T18 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T16 |
8 |
|
T17 |
40 |
|
T18 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T16 |
6 |
|
T17 |
42 |
|
T18 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T16 |
8 |
|
T17 |
40 |
|
T18 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T16 |
5 |
|
T17 |
41 |
|
T18 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1245 |
1 |
|
|
T16 |
8 |
|
T17 |
39 |
|
T18 |
19 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T16 |
5 |
|
T17 |
41 |
|
T18 |
20 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54007 |
1 |
|
|
T16 |
408 |
|
T17 |
3004 |
|
T18 |
1532 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41017 |
1 |
|
|
T16 |
936 |
|
T17 |
1201 |
|
T18 |
590 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61043 |
1 |
|
|
T16 |
570 |
|
T17 |
1371 |
|
T18 |
743 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46013 |
1 |
|
|
T16 |
86 |
|
T17 |
978 |
|
T18 |
677 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T16 |
7 |
|
T17 |
26 |
|
T18 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T16 |
11 |
|
T17 |
47 |
|
T18 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T16 |
10 |
|
T17 |
17 |
|
T18 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T16 |
7 |
|
T17 |
56 |
|
T18 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T16 |
7 |
|
T17 |
26 |
|
T18 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T16 |
11 |
|
T17 |
46 |
|
T18 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T16 |
10 |
|
T17 |
17 |
|
T18 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T16 |
6 |
|
T17 |
56 |
|
T18 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T16 |
7 |
|
T17 |
26 |
|
T18 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T16 |
11 |
|
T17 |
45 |
|
T18 |
33 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T16 |
10 |
|
T17 |
17 |
|
T18 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T16 |
5 |
|
T17 |
54 |
|
T18 |
31 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T16 |
7 |
|
T17 |
26 |
|
T18 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T16 |
11 |
|
T17 |
44 |
|
T18 |
32 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T16 |
10 |
|
T17 |
17 |
|
T18 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T16 |
5 |
|
T17 |
52 |
|
T18 |
30 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T16 |
7 |
|
T17 |
26 |
|
T18 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T16 |
11 |
|
T17 |
44 |
|
T18 |
31 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T16 |
10 |
|
T17 |
17 |
|
T18 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T16 |
5 |
|
T17 |
51 |
|
T18 |
30 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T16 |
7 |
|
T17 |
26 |
|
T18 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T16 |
11 |
|
T17 |
42 |
|
T18 |
29 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T16 |
10 |
|
T17 |
17 |
|
T18 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T16 |
5 |
|
T17 |
49 |
|
T18 |
29 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T16 |
7 |
|
T17 |
26 |
|
T18 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T16 |
11 |
|
T17 |
42 |
|
T18 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T16 |
10 |
|
T17 |
17 |
|
T18 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T16 |
5 |
|
T17 |
48 |
|
T18 |
30 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T16 |
7 |
|
T17 |
26 |
|
T18 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T16 |
11 |
|
T17 |
41 |
|
T18 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T16 |
10 |
|
T17 |
17 |
|
T18 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T16 |
4 |
|
T17 |
46 |
|
T18 |
30 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T16 |
6 |
|
T17 |
26 |
|
T18 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T16 |
11 |
|
T17 |
38 |
|
T18 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T16 |
10 |
|
T17 |
17 |
|
T18 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T16 |
3 |
|
T17 |
45 |
|
T18 |
30 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T16 |
6 |
|
T17 |
26 |
|
T18 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T16 |
11 |
|
T17 |
36 |
|
T18 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T16 |
10 |
|
T17 |
17 |
|
T18 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T16 |
3 |
|
T17 |
45 |
|
T18 |
29 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T16 |
6 |
|
T17 |
26 |
|
T18 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T16 |
11 |
|
T17 |
36 |
|
T18 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T16 |
10 |
|
T17 |
17 |
|
T18 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T16 |
3 |
|
T17 |
44 |
|
T18 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T16 |
6 |
|
T17 |
26 |
|
T18 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T16 |
11 |
|
T17 |
34 |
|
T18 |
25 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T16 |
10 |
|
T17 |
17 |
|
T18 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T16 |
2 |
|
T17 |
44 |
|
T18 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T16 |
6 |
|
T17 |
26 |
|
T18 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1202 |
1 |
|
|
T16 |
11 |
|
T17 |
32 |
|
T18 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T16 |
10 |
|
T17 |
17 |
|
T18 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T16 |
2 |
|
T17 |
43 |
|
T18 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T16 |
6 |
|
T17 |
26 |
|
T18 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1174 |
1 |
|
|
T16 |
11 |
|
T17 |
32 |
|
T18 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T16 |
10 |
|
T17 |
17 |
|
T18 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T16 |
2 |
|
T17 |
41 |
|
T18 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T16 |
6 |
|
T17 |
26 |
|
T18 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1137 |
1 |
|
|
T16 |
11 |
|
T17 |
31 |
|
T18 |
23 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T16 |
10 |
|
T17 |
17 |
|
T18 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1172 |
1 |
|
|
T16 |
2 |
|
T17 |
40 |
|
T18 |
28 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59403 |
1 |
|
|
T16 |
191 |
|
T17 |
1959 |
|
T18 |
1042 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39508 |
1 |
|
|
T16 |
356 |
|
T17 |
767 |
|
T18 |
510 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56492 |
1 |
|
|
T16 |
769 |
|
T17 |
1386 |
|
T18 |
958 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45456 |
1 |
|
|
T16 |
532 |
|
T17 |
2404 |
|
T18 |
1353 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T16 |
4 |
|
T17 |
27 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T16 |
20 |
|
T17 |
44 |
|
T18 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T16 |
2 |
|
T17 |
30 |
|
T18 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T16 |
22 |
|
T17 |
42 |
|
T18 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T16 |
4 |
|
T17 |
27 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T16 |
19 |
|
T17 |
43 |
|
T18 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T16 |
2 |
|
T17 |
30 |
|
T18 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T16 |
22 |
|
T17 |
41 |
|
T18 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T16 |
4 |
|
T17 |
27 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T16 |
19 |
|
T17 |
43 |
|
T18 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T16 |
2 |
|
T17 |
30 |
|
T18 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T16 |
22 |
|
T17 |
41 |
|
T18 |
19 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T16 |
4 |
|
T17 |
27 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T16 |
19 |
|
T17 |
39 |
|
T18 |
17 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T16 |
2 |
|
T17 |
30 |
|
T18 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T16 |
22 |
|
T17 |
41 |
|
T18 |
18 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T16 |
3 |
|
T17 |
27 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T16 |
19 |
|
T17 |
39 |
|
T18 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T16 |
2 |
|
T17 |
30 |
|
T18 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T16 |
22 |
|
T17 |
40 |
|
T18 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T16 |
3 |
|
T17 |
27 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T16 |
17 |
|
T17 |
39 |
|
T18 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T16 |
2 |
|
T17 |
30 |
|
T18 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T16 |
22 |
|
T17 |
40 |
|
T18 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T16 |
3 |
|
T17 |
27 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T16 |
17 |
|
T17 |
37 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T16 |
2 |
|
T17 |
30 |
|
T18 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T16 |
21 |
|
T17 |
39 |
|
T18 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T16 |
3 |
|
T17 |
27 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T16 |
16 |
|
T17 |
35 |
|
T18 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T16 |
2 |
|
T17 |
30 |
|
T18 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T16 |
20 |
|
T17 |
39 |
|
T18 |
16 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T16 |
3 |
|
T17 |
27 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T16 |
15 |
|
T17 |
35 |
|
T18 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T16 |
2 |
|
T17 |
29 |
|
T18 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T16 |
20 |
|
T17 |
40 |
|
T18 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T16 |
3 |
|
T17 |
27 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T16 |
15 |
|
T17 |
35 |
|
T18 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T16 |
2 |
|
T17 |
29 |
|
T18 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T16 |
19 |
|
T17 |
39 |
|
T18 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T16 |
3 |
|
T17 |
27 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T16 |
14 |
|
T17 |
35 |
|
T18 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T16 |
2 |
|
T17 |
29 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T16 |
18 |
|
T17 |
38 |
|
T18 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T16 |
3 |
|
T17 |
27 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T16 |
14 |
|
T17 |
34 |
|
T18 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T16 |
2 |
|
T17 |
29 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T16 |
18 |
|
T17 |
38 |
|
T18 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T16 |
3 |
|
T17 |
27 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1202 |
1 |
|
|
T16 |
13 |
|
T17 |
32 |
|
T18 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T16 |
2 |
|
T17 |
29 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T16 |
18 |
|
T17 |
37 |
|
T18 |
15 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T16 |
3 |
|
T17 |
27 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1171 |
1 |
|
|
T16 |
13 |
|
T17 |
31 |
|
T18 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T16 |
2 |
|
T17 |
29 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T16 |
18 |
|
T17 |
37 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T16 |
3 |
|
T17 |
27 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1135 |
1 |
|
|
T16 |
13 |
|
T17 |
29 |
|
T18 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T16 |
2 |
|
T17 |
29 |
|
T18 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T16 |
18 |
|
T17 |
37 |
|
T18 |
14 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61101 |
1 |
|
|
T16 |
576 |
|
T17 |
2876 |
|
T18 |
649 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42235 |
1 |
|
|
T16 |
405 |
|
T17 |
977 |
|
T18 |
596 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51066 |
1 |
|
|
T16 |
190 |
|
T17 |
1611 |
|
T18 |
367 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45775 |
1 |
|
|
T16 |
853 |
|
T17 |
1045 |
|
T18 |
1984 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1685 |
1 |
|
|
T16 |
14 |
|
T17 |
50 |
|
T18 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1727 |
1 |
|
|
T16 |
14 |
|
T17 |
52 |
|
T18 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T16 |
13 |
|
T17 |
50 |
|
T18 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1692 |
1 |
|
|
T16 |
14 |
|
T17 |
50 |
|
T18 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T16 |
12 |
|
T17 |
48 |
|
T18 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T16 |
14 |
|
T17 |
50 |
|
T18 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T16 |
11 |
|
T17 |
45 |
|
T18 |
33 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T16 |
13 |
|
T17 |
50 |
|
T18 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T16 |
11 |
|
T17 |
43 |
|
T18 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T16 |
13 |
|
T17 |
50 |
|
T18 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T16 |
11 |
|
T17 |
41 |
|
T18 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T16 |
13 |
|
T17 |
50 |
|
T18 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T16 |
11 |
|
T17 |
41 |
|
T18 |
29 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T16 |
13 |
|
T17 |
49 |
|
T18 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T16 |
11 |
|
T17 |
40 |
|
T18 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T16 |
13 |
|
T17 |
49 |
|
T18 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T16 |
11 |
|
T17 |
39 |
|
T18 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T16 |
13 |
|
T17 |
49 |
|
T18 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T16 |
11 |
|
T17 |
39 |
|
T18 |
28 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T16 |
13 |
|
T17 |
48 |
|
T18 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T16 |
11 |
|
T17 |
38 |
|
T18 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T16 |
12 |
|
T17 |
48 |
|
T18 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T16 |
11 |
|
T17 |
37 |
|
T18 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T16 |
11 |
|
T17 |
47 |
|
T18 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T16 |
11 |
|
T17 |
36 |
|
T18 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T16 |
11 |
|
T17 |
45 |
|
T18 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T16 |
11 |
|
T17 |
34 |
|
T18 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T16 |
10 |
|
T17 |
41 |
|
T18 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T16 |
3 |
|
T17 |
23 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T16 |
11 |
|
T17 |
34 |
|
T18 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T16 |
3 |
|
T17 |
21 |
|
T18 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T16 |
10 |
|
T17 |
41 |
|
T18 |
31 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57543 |
1 |
|
|
T16 |
611 |
|
T17 |
2577 |
|
T18 |
522 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44883 |
1 |
|
|
T16 |
261 |
|
T17 |
1164 |
|
T18 |
1466 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54538 |
1 |
|
|
T16 |
414 |
|
T17 |
1551 |
|
T18 |
888 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44143 |
1 |
|
|
T16 |
745 |
|
T17 |
1113 |
|
T18 |
758 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T16 |
9 |
|
T17 |
58 |
|
T18 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T16 |
9 |
|
T17 |
55 |
|
T18 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1616 |
1 |
|
|
T16 |
9 |
|
T17 |
58 |
|
T18 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T16 |
9 |
|
T17 |
53 |
|
T18 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T16 |
9 |
|
T17 |
57 |
|
T18 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T16 |
8 |
|
T17 |
53 |
|
T18 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T16 |
8 |
|
T17 |
56 |
|
T18 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T16 |
8 |
|
T17 |
49 |
|
T18 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T16 |
9 |
|
T17 |
53 |
|
T18 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T16 |
8 |
|
T17 |
47 |
|
T18 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T16 |
9 |
|
T17 |
51 |
|
T18 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T16 |
8 |
|
T17 |
46 |
|
T18 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T16 |
9 |
|
T17 |
50 |
|
T18 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T16 |
8 |
|
T17 |
46 |
|
T18 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T16 |
9 |
|
T17 |
49 |
|
T18 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T16 |
8 |
|
T17 |
45 |
|
T18 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T16 |
9 |
|
T17 |
48 |
|
T18 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T16 |
8 |
|
T17 |
44 |
|
T18 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T16 |
9 |
|
T17 |
45 |
|
T18 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T16 |
8 |
|
T17 |
44 |
|
T18 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T16 |
9 |
|
T17 |
45 |
|
T18 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T16 |
6 |
|
T17 |
42 |
|
T18 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T16 |
8 |
|
T17 |
45 |
|
T18 |
20 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T16 |
7 |
|
T17 |
24 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T16 |
6 |
|
T17 |
41 |
|
T18 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T16 |
8 |
|
T17 |
43 |
|
T18 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T16 |
6 |
|
T17 |
40 |
|
T18 |
25 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T16 |
8 |
|
T17 |
43 |
|
T18 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1211 |
1 |
|
|
T16 |
6 |
|
T17 |
40 |
|
T18 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T16 |
6 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T16 |
8 |
|
T17 |
42 |
|
T18 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1177 |
1 |
|
|
T16 |
6 |
|
T17 |
38 |
|
T18 |
23 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55625 |
1 |
|
|
T16 |
181 |
|
T17 |
3186 |
|
T18 |
716 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48182 |
1 |
|
|
T16 |
347 |
|
T17 |
843 |
|
T18 |
706 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51860 |
1 |
|
|
T16 |
267 |
|
T17 |
1643 |
|
T18 |
1602 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45667 |
1 |
|
|
T16 |
1090 |
|
T17 |
908 |
|
T18 |
534 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T16 |
6 |
|
T17 |
27 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T16 |
17 |
|
T17 |
44 |
|
T18 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T16 |
17 |
|
T17 |
43 |
|
T18 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T16 |
6 |
|
T17 |
27 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T16 |
16 |
|
T17 |
43 |
|
T18 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T16 |
17 |
|
T17 |
42 |
|
T18 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T16 |
6 |
|
T17 |
27 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T16 |
14 |
|
T17 |
41 |
|
T18 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T16 |
16 |
|
T17 |
41 |
|
T18 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T16 |
6 |
|
T17 |
27 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T16 |
14 |
|
T17 |
41 |
|
T18 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T16 |
16 |
|
T17 |
38 |
|
T18 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T16 |
5 |
|
T17 |
27 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T16 |
14 |
|
T17 |
38 |
|
T18 |
27 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T16 |
14 |
|
T17 |
36 |
|
T18 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T16 |
5 |
|
T17 |
27 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T16 |
14 |
|
T17 |
37 |
|
T18 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T16 |
14 |
|
T17 |
36 |
|
T18 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T16 |
5 |
|
T17 |
27 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T16 |
14 |
|
T17 |
37 |
|
T18 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T16 |
14 |
|
T17 |
35 |
|
T18 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T16 |
5 |
|
T17 |
27 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T16 |
14 |
|
T17 |
36 |
|
T18 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T16 |
14 |
|
T17 |
35 |
|
T18 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T16 |
5 |
|
T17 |
27 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T16 |
13 |
|
T17 |
35 |
|
T18 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T16 |
14 |
|
T17 |
35 |
|
T18 |
25 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T16 |
5 |
|
T17 |
27 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T16 |
12 |
|
T17 |
35 |
|
T18 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T16 |
14 |
|
T17 |
35 |
|
T18 |
24 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T16 |
5 |
|
T17 |
27 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T16 |
12 |
|
T17 |
35 |
|
T18 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T16 |
14 |
|
T17 |
35 |
|
T18 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T16 |
5 |
|
T17 |
27 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T16 |
12 |
|
T17 |
34 |
|
T18 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T16 |
13 |
|
T17 |
34 |
|
T18 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T16 |
5 |
|
T17 |
27 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T16 |
12 |
|
T17 |
33 |
|
T18 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T16 |
13 |
|
T17 |
34 |
|
T18 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T16 |
5 |
|
T17 |
27 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T16 |
12 |
|
T17 |
32 |
|
T18 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T16 |
13 |
|
T17 |
34 |
|
T18 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T16 |
5 |
|
T17 |
27 |
|
T18 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1181 |
1 |
|
|
T16 |
12 |
|
T17 |
31 |
|
T18 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
14 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1173 |
1 |
|
|
T16 |
13 |
|
T17 |
33 |
|
T18 |
21 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60406 |
1 |
|
|
T16 |
862 |
|
T17 |
1669 |
|
T18 |
690 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41899 |
1 |
|
|
T16 |
396 |
|
T17 |
1447 |
|
T18 |
505 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56969 |
1 |
|
|
T16 |
211 |
|
T17 |
1393 |
|
T18 |
763 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41493 |
1 |
|
|
T16 |
312 |
|
T17 |
1985 |
|
T18 |
1784 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T16 |
21 |
|
T17 |
53 |
|
T18 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T16 |
5 |
|
T17 |
23 |
|
T18 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T16 |
20 |
|
T17 |
52 |
|
T18 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T16 |
21 |
|
T17 |
53 |
|
T18 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T16 |
5 |
|
T17 |
23 |
|
T18 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T16 |
20 |
|
T17 |
50 |
|
T18 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T16 |
21 |
|
T17 |
53 |
|
T18 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T16 |
5 |
|
T17 |
23 |
|
T18 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T16 |
20 |
|
T17 |
48 |
|
T18 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T16 |
21 |
|
T17 |
51 |
|
T18 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T16 |
5 |
|
T17 |
23 |
|
T18 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T16 |
20 |
|
T17 |
46 |
|
T18 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T16 |
21 |
|
T17 |
51 |
|
T18 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T16 |
5 |
|
T17 |
23 |
|
T18 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T16 |
20 |
|
T17 |
45 |
|
T18 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T16 |
21 |
|
T17 |
48 |
|
T18 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T16 |
5 |
|
T17 |
23 |
|
T18 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T16 |
19 |
|
T17 |
44 |
|
T18 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T16 |
21 |
|
T17 |
48 |
|
T18 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T16 |
5 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T16 |
19 |
|
T17 |
42 |
|
T18 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T16 |
5 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T16 |
20 |
|
T17 |
47 |
|
T18 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T16 |
5 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T16 |
17 |
|
T17 |
42 |
|
T18 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T16 |
4 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T16 |
19 |
|
T17 |
47 |
|
T18 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T16 |
17 |
|
T17 |
43 |
|
T18 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T16 |
4 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T16 |
19 |
|
T17 |
46 |
|
T18 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T16 |
17 |
|
T17 |
41 |
|
T18 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T16 |
4 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T16 |
18 |
|
T17 |
46 |
|
T18 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T16 |
17 |
|
T17 |
39 |
|
T18 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T16 |
4 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T16 |
16 |
|
T17 |
45 |
|
T18 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T16 |
16 |
|
T17 |
37 |
|
T18 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T16 |
4 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T16 |
15 |
|
T17 |
45 |
|
T18 |
18 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T16 |
14 |
|
T17 |
36 |
|
T18 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T16 |
4 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T16 |
15 |
|
T17 |
45 |
|
T18 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T16 |
14 |
|
T17 |
35 |
|
T18 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T16 |
4 |
|
T17 |
21 |
|
T18 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T16 |
15 |
|
T17 |
44 |
|
T18 |
15 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T16 |
5 |
|
T17 |
22 |
|
T18 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1165 |
1 |
|
|
T16 |
14 |
|
T17 |
34 |
|
T18 |
24 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57659 |
1 |
|
|
T16 |
533 |
|
T17 |
2984 |
|
T18 |
813 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43274 |
1 |
|
|
T16 |
288 |
|
T17 |
968 |
|
T18 |
442 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54756 |
1 |
|
|
T16 |
264 |
|
T17 |
1420 |
|
T18 |
1615 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46212 |
1 |
|
|
T16 |
856 |
|
T17 |
961 |
|
T18 |
707 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T16 |
14 |
|
T17 |
52 |
|
T18 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T16 |
6 |
|
T17 |
30 |
|
T18 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T16 |
14 |
|
T17 |
50 |
|
T18 |
34 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T16 |
14 |
|
T17 |
51 |
|
T18 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T16 |
6 |
|
T17 |
30 |
|
T18 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T16 |
14 |
|
T17 |
50 |
|
T18 |
32 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T16 |
14 |
|
T17 |
50 |
|
T18 |
34 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T16 |
6 |
|
T17 |
30 |
|
T18 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T16 |
14 |
|
T17 |
50 |
|
T18 |
32 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T16 |
14 |
|
T17 |
48 |
|
T18 |
33 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T16 |
6 |
|
T17 |
30 |
|
T18 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T16 |
14 |
|
T17 |
50 |
|
T18 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T16 |
13 |
|
T17 |
47 |
|
T18 |
32 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T16 |
6 |
|
T17 |
30 |
|
T18 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T16 |
13 |
|
T17 |
47 |
|
T18 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T16 |
13 |
|
T17 |
45 |
|
T18 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T16 |
6 |
|
T17 |
30 |
|
T18 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T16 |
13 |
|
T17 |
47 |
|
T18 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T16 |
13 |
|
T17 |
44 |
|
T18 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T16 |
6 |
|
T17 |
30 |
|
T18 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T16 |
12 |
|
T17 |
45 |
|
T18 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T16 |
13 |
|
T17 |
44 |
|
T18 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T16 |
6 |
|
T17 |
30 |
|
T18 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T16 |
11 |
|
T17 |
42 |
|
T18 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T16 |
12 |
|
T17 |
41 |
|
T18 |
26 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T16 |
6 |
|
T17 |
30 |
|
T18 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T16 |
11 |
|
T17 |
41 |
|
T18 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T16 |
12 |
|
T17 |
40 |
|
T18 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T16 |
6 |
|
T17 |
30 |
|
T18 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T16 |
9 |
|
T17 |
40 |
|
T18 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T16 |
12 |
|
T17 |
39 |
|
T18 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T16 |
6 |
|
T17 |
30 |
|
T18 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T16 |
8 |
|
T17 |
39 |
|
T18 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T16 |
12 |
|
T17 |
39 |
|
T18 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T16 |
6 |
|
T17 |
30 |
|
T18 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1222 |
1 |
|
|
T16 |
7 |
|
T17 |
37 |
|
T18 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T16 |
12 |
|
T17 |
39 |
|
T18 |
22 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T16 |
6 |
|
T17 |
30 |
|
T18 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1198 |
1 |
|
|
T16 |
7 |
|
T17 |
37 |
|
T18 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1181 |
1 |
|
|
T16 |
12 |
|
T17 |
38 |
|
T18 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T16 |
6 |
|
T17 |
30 |
|
T18 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1160 |
1 |
|
|
T16 |
6 |
|
T17 |
36 |
|
T18 |
26 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1144 |
1 |
|
|
T16 |
12 |
|
T17 |
37 |
|
T18 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T16 |
6 |
|
T17 |
30 |
|
T18 |
11 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1129 |
1 |
|
|
T16 |
6 |
|
T17 |
35 |
|
T18 |
25 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54744 |
1 |
|
|
T16 |
289 |
|
T17 |
2846 |
|
T18 |
757 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
38089 |
1 |
|
|
T16 |
283 |
|
T17 |
946 |
|
T18 |
431 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62335 |
1 |
|
|
T16 |
1049 |
|
T17 |
1741 |
|
T18 |
1022 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46866 |
1 |
|
|
T16 |
298 |
|
T17 |
987 |
|
T18 |
1507 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T16 |
6 |
|
T17 |
27 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T16 |
15 |
|
T17 |
46 |
|
T18 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T16 |
15 |
|
T17 |
45 |
|
T18 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T16 |
6 |
|
T17 |
27 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T16 |
13 |
|
T17 |
46 |
|
T18 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T16 |
15 |
|
T17 |
44 |
|
T18 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T16 |
6 |
|
T17 |
27 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T16 |
13 |
|
T17 |
45 |
|
T18 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T16 |
15 |
|
T17 |
42 |
|
T18 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T16 |
6 |
|
T17 |
27 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T16 |
13 |
|
T17 |
45 |
|
T18 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T16 |
14 |
|
T17 |
41 |
|
T18 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T16 |
6 |
|
T17 |
27 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T16 |
13 |
|
T17 |
44 |
|
T18 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T16 |
14 |
|
T17 |
38 |
|
T18 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T16 |
6 |
|
T17 |
27 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T16 |
13 |
|
T17 |
43 |
|
T18 |
25 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T16 |
14 |
|
T17 |
37 |
|
T18 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T16 |
6 |
|
T17 |
27 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T16 |
12 |
|
T17 |
43 |
|
T18 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T16 |
14 |
|
T17 |
37 |
|
T18 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T16 |
6 |
|
T17 |
27 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T16 |
11 |
|
T17 |
41 |
|
T18 |
22 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T16 |
14 |
|
T17 |
34 |
|
T18 |
28 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T16 |
5 |
|
T17 |
27 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T16 |
11 |
|
T17 |
41 |
|
T18 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T16 |
13 |
|
T17 |
33 |
|
T18 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T16 |
5 |
|
T17 |
27 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T16 |
11 |
|
T17 |
40 |
|
T18 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T16 |
12 |
|
T17 |
33 |
|
T18 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T16 |
5 |
|
T17 |
27 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T16 |
11 |
|
T17 |
38 |
|
T18 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T16 |
12 |
|
T17 |
33 |
|
T18 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T16 |
5 |
|
T17 |
27 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T16 |
11 |
|
T17 |
37 |
|
T18 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T16 |
12 |
|
T17 |
32 |
|
T18 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T16 |
5 |
|
T17 |
27 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T16 |
11 |
|
T17 |
36 |
|
T18 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T16 |
12 |
|
T17 |
32 |
|
T18 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T16 |
5 |
|
T17 |
27 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1180 |
1 |
|
|
T16 |
11 |
|
T17 |
35 |
|
T18 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1154 |
1 |
|
|
T16 |
12 |
|
T17 |
32 |
|
T18 |
21 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T16 |
5 |
|
T17 |
27 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1149 |
1 |
|
|
T16 |
11 |
|
T17 |
33 |
|
T18 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T16 |
6 |
|
T17 |
28 |
|
T18 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1133 |
1 |
|
|
T16 |
12 |
|
T17 |
32 |
|
T18 |
21 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56243 |
1 |
|
|
T16 |
295 |
|
T17 |
1568 |
|
T18 |
1567 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44297 |
1 |
|
|
T16 |
825 |
|
T17 |
1235 |
|
T18 |
657 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58003 |
1 |
|
|
T16 |
458 |
|
T17 |
1158 |
|
T18 |
866 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44640 |
1 |
|
|
T16 |
344 |
|
T17 |
2420 |
|
T18 |
701 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T16 |
8 |
|
T17 |
20 |
|
T18 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T16 |
12 |
|
T17 |
58 |
|
T18 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T16 |
13 |
|
T17 |
56 |
|
T18 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T16 |
8 |
|
T17 |
20 |
|
T18 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T16 |
12 |
|
T17 |
56 |
|
T18 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T16 |
13 |
|
T17 |
55 |
|
T18 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T16 |
8 |
|
T17 |
20 |
|
T18 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T16 |
12 |
|
T17 |
55 |
|
T18 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T16 |
13 |
|
T17 |
53 |
|
T18 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T16 |
8 |
|
T17 |
20 |
|
T18 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T16 |
12 |
|
T17 |
54 |
|
T18 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T16 |
13 |
|
T17 |
51 |
|
T18 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T16 |
8 |
|
T17 |
20 |
|
T18 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T16 |
12 |
|
T17 |
52 |
|
T18 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T16 |
13 |
|
T17 |
51 |
|
T18 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T16 |
8 |
|
T17 |
20 |
|
T18 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T16 |
12 |
|
T17 |
50 |
|
T18 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T16 |
13 |
|
T17 |
50 |
|
T18 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T16 |
8 |
|
T17 |
20 |
|
T18 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T16 |
11 |
|
T17 |
50 |
|
T18 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T16 |
13 |
|
T17 |
48 |
|
T18 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T16 |
8 |
|
T17 |
20 |
|
T18 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T16 |
11 |
|
T17 |
49 |
|
T18 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T16 |
13 |
|
T17 |
48 |
|
T18 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T16 |
7 |
|
T17 |
20 |
|
T18 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T16 |
11 |
|
T17 |
49 |
|
T18 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T16 |
13 |
|
T17 |
48 |
|
T18 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T16 |
7 |
|
T17 |
20 |
|
T18 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T16 |
9 |
|
T17 |
49 |
|
T18 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T16 |
13 |
|
T17 |
47 |
|
T18 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T16 |
7 |
|
T17 |
20 |
|
T18 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T16 |
9 |
|
T17 |
49 |
|
T18 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T16 |
13 |
|
T17 |
47 |
|
T18 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T16 |
7 |
|
T17 |
20 |
|
T18 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T16 |
8 |
|
T17 |
48 |
|
T18 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T16 |
13 |
|
T17 |
47 |
|
T18 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T16 |
7 |
|
T17 |
20 |
|
T18 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1187 |
1 |
|
|
T16 |
8 |
|
T17 |
48 |
|
T18 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T16 |
13 |
|
T17 |
46 |
|
T18 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T16 |
7 |
|
T17 |
20 |
|
T18 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1150 |
1 |
|
|
T16 |
8 |
|
T17 |
45 |
|
T18 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1153 |
1 |
|
|
T16 |
12 |
|
T17 |
41 |
|
T18 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T16 |
7 |
|
T17 |
20 |
|
T18 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1120 |
1 |
|
|
T16 |
7 |
|
T17 |
44 |
|
T18 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T16 |
6 |
|
T17 |
22 |
|
T18 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1122 |
1 |
|
|
T16 |
12 |
|
T17 |
40 |
|
T18 |
21 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61713 |
1 |
|
|
T16 |
310 |
|
T17 |
2925 |
|
T18 |
595 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42852 |
1 |
|
|
T16 |
203 |
|
T17 |
1255 |
|
T18 |
563 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53089 |
1 |
|
|
T16 |
508 |
|
T17 |
1414 |
|
T18 |
1911 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43426 |
1 |
|
|
T16 |
984 |
|
T17 |
955 |
|
T18 |
696 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T16 |
10 |
|
T17 |
47 |
|
T18 |
28 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T16 |
11 |
|
T17 |
46 |
|
T18 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1590 |
1 |
|
|
T16 |
10 |
|
T17 |
47 |
|
T18 |
27 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T16 |
11 |
|
T17 |
46 |
|
T18 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T16 |
10 |
|
T17 |
46 |
|
T18 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T16 |
11 |
|
T17 |
46 |
|
T18 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T16 |
9 |
|
T17 |
46 |
|
T18 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T16 |
11 |
|
T17 |
46 |
|
T18 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T16 |
9 |
|
T17 |
44 |
|
T18 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T16 |
11 |
|
T17 |
45 |
|
T18 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T16 |
8 |
|
T17 |
44 |
|
T18 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T16 |
11 |
|
T17 |
45 |
|
T18 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T16 |
8 |
|
T17 |
43 |
|
T18 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
10 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T16 |
11 |
|
T17 |
44 |
|
T18 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T16 |
7 |
|
T17 |
23 |
|
T18 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T16 |
8 |
|
T17 |
42 |
|
T18 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
10 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T16 |
11 |
|
T17 |
42 |
|
T18 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T16 |
7 |
|
T17 |
42 |
|
T18 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
10 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T16 |
11 |
|
T17 |
40 |
|
T18 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T16 |
7 |
|
T17 |
42 |
|
T18 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
10 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T16 |
11 |
|
T17 |
38 |
|
T18 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T16 |
6 |
|
T17 |
40 |
|
T18 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
10 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T16 |
11 |
|
T17 |
38 |
|
T18 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T16 |
6 |
|
T17 |
40 |
|
T18 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
10 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T16 |
11 |
|
T17 |
36 |
|
T18 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T16 |
6 |
|
T17 |
38 |
|
T18 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
10 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T16 |
11 |
|
T17 |
34 |
|
T18 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T16 |
6 |
|
T17 |
38 |
|
T18 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
10 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1171 |
1 |
|
|
T16 |
10 |
|
T17 |
34 |
|
T18 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1156 |
1 |
|
|
T16 |
6 |
|
T17 |
37 |
|
T18 |
19 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T16 |
6 |
|
T17 |
24 |
|
T18 |
10 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1147 |
1 |
|
|
T16 |
10 |
|
T17 |
33 |
|
T18 |
23 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54450 |
1 |
|
|
T16 |
347 |
|
T17 |
1420 |
|
T18 |
1834 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47526 |
1 |
|
|
T16 |
726 |
|
T17 |
1077 |
|
T18 |
742 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54463 |
1 |
|
|
T16 |
655 |
|
T17 |
2847 |
|
T18 |
669 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44462 |
1 |
|
|
T16 |
316 |
|
T17 |
1262 |
|
T18 |
590 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T16 |
7 |
|
T17 |
18 |
|
T18 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1644 |
1 |
|
|
T16 |
10 |
|
T17 |
50 |
|
T18 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T16 |
5 |
|
T17 |
20 |
|
T18 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T16 |
11 |
|
T17 |
49 |
|
T18 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T16 |
7 |
|
T17 |
18 |
|
T18 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T16 |
8 |
|
T17 |
49 |
|
T18 |
25 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T16 |
5 |
|
T17 |
20 |
|
T18 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1605 |
1 |
|
|
T16 |
11 |
|
T17 |
49 |
|
T18 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T16 |
7 |
|
T17 |
18 |
|
T18 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T16 |
8 |
|
T17 |
49 |
|
T18 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T16 |
5 |
|
T17 |
20 |
|
T18 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T16 |
11 |
|
T17 |
47 |
|
T18 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T16 |
7 |
|
T17 |
18 |
|
T18 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T16 |
8 |
|
T17 |
47 |
|
T18 |
24 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T16 |
5 |
|
T17 |
20 |
|
T18 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T16 |
11 |
|
T17 |
47 |
|
T18 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T16 |
8 |
|
T17 |
47 |
|
T18 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T16 |
5 |
|
T17 |
20 |
|
T18 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T16 |
11 |
|
T17 |
47 |
|
T18 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T16 |
8 |
|
T17 |
46 |
|
T18 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T16 |
5 |
|
T17 |
20 |
|
T18 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T16 |
11 |
|
T17 |
46 |
|
T18 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T16 |
7 |
|
T17 |
46 |
|
T18 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T16 |
5 |
|
T17 |
20 |
|
T18 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T16 |
11 |
|
T17 |
45 |
|
T18 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T16 |
7 |
|
T17 |
46 |
|
T18 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T16 |
5 |
|
T17 |
20 |
|
T18 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T16 |
11 |
|
T17 |
44 |
|
T18 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T16 |
6 |
|
T17 |
46 |
|
T18 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T16 |
5 |
|
T17 |
20 |
|
T18 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T16 |
11 |
|
T17 |
42 |
|
T18 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T16 |
5 |
|
T17 |
45 |
|
T18 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T16 |
5 |
|
T17 |
20 |
|
T18 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T16 |
11 |
|
T17 |
40 |
|
T18 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T16 |
4 |
|
T17 |
45 |
|
T18 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T16 |
5 |
|
T17 |
20 |
|
T18 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T16 |
11 |
|
T17 |
39 |
|
T18 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T16 |
4 |
|
T17 |
45 |
|
T18 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T16 |
5 |
|
T17 |
20 |
|
T18 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T16 |
11 |
|
T17 |
36 |
|
T18 |
21 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T16 |
4 |
|
T17 |
45 |
|
T18 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T16 |
5 |
|
T17 |
20 |
|
T18 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T16 |
11 |
|
T17 |
35 |
|
T18 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T16 |
4 |
|
T17 |
45 |
|
T18 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T16 |
5 |
|
T17 |
20 |
|
T18 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T16 |
11 |
|
T17 |
34 |
|
T18 |
20 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1198 |
1 |
|
|
T16 |
4 |
|
T17 |
45 |
|
T18 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T16 |
5 |
|
T17 |
20 |
|
T18 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T16 |
10 |
|
T17 |
31 |
|
T18 |
19 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56138 |
1 |
|
|
T16 |
396 |
|
T17 |
1689 |
|
T18 |
2072 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47550 |
1 |
|
|
T16 |
244 |
|
T17 |
2251 |
|
T18 |
489 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54988 |
1 |
|
|
T16 |
1151 |
|
T17 |
1456 |
|
T18 |
750 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42438 |
1 |
|
|
T16 |
251 |
|
T17 |
1064 |
|
T18 |
479 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1613 |
1 |
|
|
T16 |
9 |
|
T17 |
51 |
|
T18 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1616 |
1 |
|
|
T16 |
10 |
|
T17 |
58 |
|
T18 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T16 |
8 |
|
T17 |
50 |
|
T18 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T16 |
10 |
|
T17 |
54 |
|
T18 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T16 |
8 |
|
T17 |
49 |
|
T18 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T16 |
10 |
|
T17 |
54 |
|
T18 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T16 |
7 |
|
T17 |
48 |
|
T18 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T16 |
10 |
|
T17 |
53 |
|
T18 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T16 |
8 |
|
T17 |
47 |
|
T18 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T16 |
10 |
|
T17 |
53 |
|
T18 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T16 |
8 |
|
T17 |
45 |
|
T18 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T16 |
10 |
|
T17 |
52 |
|
T18 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T16 |
8 |
|
T17 |
45 |
|
T18 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T16 |
10 |
|
T17 |
51 |
|
T18 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T16 |
7 |
|
T17 |
45 |
|
T18 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T16 |
10 |
|
T17 |
49 |
|
T18 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T16 |
7 |
|
T17 |
45 |
|
T18 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T16 |
9 |
|
T17 |
47 |
|
T18 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T16 |
7 |
|
T17 |
44 |
|
T18 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T16 |
9 |
|
T17 |
46 |
|
T18 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T16 |
7 |
|
T17 |
43 |
|
T18 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T16 |
9 |
|
T17 |
46 |
|
T18 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T16 |
6 |
|
T17 |
43 |
|
T18 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T16 |
6 |
|
T17 |
18 |
|
T18 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T16 |
8 |
|
T17 |
43 |
|
T18 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T16 |
6 |
|
T17 |
42 |
|
T18 |
21 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T16 |
6 |
|
T17 |
17 |
|
T18 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T16 |
8 |
|
T17 |
42 |
|
T18 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T16 |
6 |
|
T17 |
40 |
|
T18 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T16 |
6 |
|
T17 |
17 |
|
T18 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T16 |
8 |
|
T17 |
40 |
|
T18 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1188 |
1 |
|
|
T16 |
5 |
|
T17 |
38 |
|
T18 |
18 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T16 |
6 |
|
T17 |
17 |
|
T18 |
12 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1151 |
1 |
|
|
T16 |
8 |
|
T17 |
38 |
|
T18 |
17 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61729 |
1 |
|
|
T16 |
479 |
|
T17 |
1818 |
|
T18 |
1844 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40786 |
1 |
|
|
T16 |
185 |
|
T17 |
936 |
|
T18 |
562 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57855 |
1 |
|
|
T16 |
1058 |
|
T17 |
2750 |
|
T18 |
677 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42129 |
1 |
|
|
T16 |
244 |
|
T17 |
1028 |
|
T18 |
614 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T16 |
11 |
|
T17 |
46 |
|
T18 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T16 |
9 |
|
T17 |
26 |
|
T18 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T16 |
9 |
|
T17 |
46 |
|
T18 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T16 |
11 |
|
T17 |
46 |
|
T18 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T16 |
9 |
|
T17 |
26 |
|
T18 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T16 |
9 |
|
T17 |
44 |
|
T18 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T16 |
10 |
|
T17 |
45 |
|
T18 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T16 |
9 |
|
T17 |
26 |
|
T18 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T16 |
9 |
|
T17 |
43 |
|
T18 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T16 |
7 |
|
T17 |
25 |
|
T18 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T16 |
10 |
|
T17 |
45 |
|
T18 |
35 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T16 |
9 |
|
T17 |
26 |
|
T18 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T16 |
9 |
|
T17 |
43 |
|
T18 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T16 |
11 |
|
T17 |
45 |
|
T18 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T16 |
9 |
|
T17 |
26 |
|
T18 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T16 |
8 |
|
T17 |
42 |
|
T18 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T16 |
11 |
|
T17 |
44 |
|
T18 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T16 |
9 |
|
T17 |
26 |
|
T18 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T16 |
8 |
|
T17 |
41 |
|
T18 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T16 |
11 |
|
T17 |
44 |
|
T18 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T16 |
9 |
|
T17 |
26 |
|
T18 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T16 |
8 |
|
T17 |
41 |
|
T18 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T16 |
11 |
|
T17 |
43 |
|
T18 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T16 |
9 |
|
T17 |
26 |
|
T18 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T16 |
8 |
|
T17 |
41 |
|
T18 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T16 |
11 |
|
T17 |
38 |
|
T18 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T16 |
9 |
|
T17 |
25 |
|
T18 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T16 |
8 |
|
T17 |
41 |
|
T18 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T16 |
11 |
|
T17 |
36 |
|
T18 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T16 |
9 |
|
T17 |
25 |
|
T18 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T16 |
8 |
|
T17 |
41 |
|
T18 |
27 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T16 |
11 |
|
T17 |
36 |
|
T18 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T16 |
9 |
|
T17 |
25 |
|
T18 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T16 |
8 |
|
T17 |
41 |
|
T18 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T16 |
10 |
|
T17 |
35 |
|
T18 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T16 |
9 |
|
T17 |
25 |
|
T18 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T16 |
7 |
|
T17 |
37 |
|
T18 |
25 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1188 |
1 |
|
|
T16 |
10 |
|
T17 |
34 |
|
T18 |
26 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T16 |
9 |
|
T17 |
25 |
|
T18 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1192 |
1 |
|
|
T16 |
7 |
|
T17 |
37 |
|
T18 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1163 |
1 |
|
|
T16 |
9 |
|
T17 |
32 |
|
T18 |
26 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T16 |
9 |
|
T17 |
25 |
|
T18 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1166 |
1 |
|
|
T16 |
7 |
|
T17 |
37 |
|
T18 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T16 |
6 |
|
T17 |
25 |
|
T18 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1129 |
1 |
|
|
T16 |
9 |
|
T17 |
32 |
|
T18 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T16 |
9 |
|
T17 |
25 |
|
T18 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1135 |
1 |
|
|
T16 |
7 |
|
T17 |
37 |
|
T18 |
23 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57237 |
1 |
|
|
T16 |
1249 |
|
T17 |
2818 |
|
T18 |
510 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46463 |
1 |
|
|
T16 |
290 |
|
T17 |
962 |
|
T18 |
525 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54776 |
1 |
|
|
T16 |
179 |
|
T17 |
1516 |
|
T18 |
1138 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41606 |
1 |
|
|
T16 |
196 |
|
T17 |
1112 |
|
T18 |
1528 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T16 |
16 |
|
T17 |
54 |
|
T18 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T16 |
14 |
|
T17 |
56 |
|
T18 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T16 |
16 |
|
T17 |
52 |
|
T18 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T16 |
14 |
|
T17 |
55 |
|
T18 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1590 |
1 |
|
|
T16 |
16 |
|
T17 |
51 |
|
T18 |
27 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T16 |
14 |
|
T17 |
55 |
|
T18 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T16 |
14 |
|
T17 |
49 |
|
T18 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T16 |
14 |
|
T17 |
54 |
|
T18 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T16 |
13 |
|
T17 |
47 |
|
T18 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T16 |
14 |
|
T17 |
54 |
|
T18 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T16 |
11 |
|
T17 |
46 |
|
T18 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T16 |
14 |
|
T17 |
54 |
|
T18 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T16 |
11 |
|
T17 |
44 |
|
T18 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T16 |
14 |
|
T17 |
54 |
|
T18 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T16 |
11 |
|
T17 |
42 |
|
T18 |
26 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T16 |
7 |
|
T17 |
21 |
|
T18 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T16 |
14 |
|
T17 |
53 |
|
T18 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T16 |
11 |
|
T17 |
42 |
|
T18 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T16 |
7 |
|
T17 |
20 |
|
T18 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T16 |
12 |
|
T17 |
54 |
|
T18 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T16 |
11 |
|
T17 |
40 |
|
T18 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T16 |
7 |
|
T17 |
20 |
|
T18 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T16 |
11 |
|
T17 |
53 |
|
T18 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T16 |
11 |
|
T17 |
40 |
|
T18 |
25 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T16 |
7 |
|
T17 |
20 |
|
T18 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T16 |
10 |
|
T17 |
52 |
|
T18 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T16 |
11 |
|
T17 |
38 |
|
T18 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T16 |
7 |
|
T17 |
20 |
|
T18 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T16 |
9 |
|
T17 |
51 |
|
T18 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T16 |
11 |
|
T17 |
38 |
|
T18 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T16 |
7 |
|
T17 |
20 |
|
T18 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T16 |
8 |
|
T17 |
49 |
|
T18 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T16 |
11 |
|
T17 |
37 |
|
T18 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T16 |
7 |
|
T17 |
20 |
|
T18 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T16 |
8 |
|
T17 |
48 |
|
T18 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T16 |
6 |
|
T17 |
23 |
|
T18 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1201 |
1 |
|
|
T16 |
11 |
|
T17 |
34 |
|
T18 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T16 |
7 |
|
T17 |
20 |
|
T18 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T16 |
8 |
|
T17 |
46 |
|
T18 |
15 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57826 |
1 |
|
|
T16 |
1028 |
|
T17 |
986 |
|
T18 |
684 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44514 |
1 |
|
|
T16 |
310 |
|
T17 |
2496 |
|
T18 |
631 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53147 |
1 |
|
|
T16 |
393 |
|
T17 |
1095 |
|
T18 |
1801 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45766 |
1 |
|
|
T16 |
241 |
|
T17 |
1703 |
|
T18 |
647 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T16 |
5 |
|
T17 |
12 |
|
T18 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T16 |
14 |
|
T17 |
71 |
|
T18 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T16 |
5 |
|
T17 |
15 |
|
T18 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1616 |
1 |
|
|
T16 |
13 |
|
T17 |
68 |
|
T18 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T16 |
5 |
|
T17 |
12 |
|
T18 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T16 |
14 |
|
T17 |
71 |
|
T18 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T16 |
5 |
|
T17 |
15 |
|
T18 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T16 |
13 |
|
T17 |
68 |
|
T18 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T16 |
5 |
|
T17 |
12 |
|
T18 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T16 |
14 |
|
T17 |
68 |
|
T18 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T16 |
5 |
|
T17 |
15 |
|
T18 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T16 |
12 |
|
T17 |
67 |
|
T18 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T16 |
5 |
|
T17 |
12 |
|
T18 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T16 |
14 |
|
T17 |
68 |
|
T18 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T16 |
5 |
|
T17 |
15 |
|
T18 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T16 |
12 |
|
T17 |
65 |
|
T18 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T16 |
5 |
|
T17 |
12 |
|
T18 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T16 |
14 |
|
T17 |
67 |
|
T18 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T16 |
5 |
|
T17 |
15 |
|
T18 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T16 |
12 |
|
T17 |
65 |
|
T18 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T16 |
5 |
|
T17 |
12 |
|
T18 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T16 |
13 |
|
T17 |
65 |
|
T18 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T16 |
5 |
|
T17 |
15 |
|
T18 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T16 |
12 |
|
T17 |
62 |
|
T18 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T16 |
5 |
|
T17 |
12 |
|
T18 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T16 |
12 |
|
T17 |
63 |
|
T18 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T16 |
5 |
|
T17 |
15 |
|
T18 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T16 |
12 |
|
T17 |
61 |
|
T18 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T16 |
5 |
|
T17 |
12 |
|
T18 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T16 |
12 |
|
T17 |
62 |
|
T18 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T16 |
5 |
|
T17 |
15 |
|
T18 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T16 |
11 |
|
T17 |
61 |
|
T18 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T16 |
5 |
|
T17 |
12 |
|
T18 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T16 |
11 |
|
T17 |
59 |
|
T18 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T16 |
5 |
|
T17 |
14 |
|
T18 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T16 |
11 |
|
T17 |
61 |
|
T18 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T16 |
5 |
|
T17 |
12 |
|
T18 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T16 |
11 |
|
T17 |
58 |
|
T18 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T16 |
5 |
|
T17 |
14 |
|
T18 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T16 |
11 |
|
T17 |
59 |
|
T18 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T16 |
5 |
|
T17 |
12 |
|
T18 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T16 |
11 |
|
T17 |
56 |
|
T18 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T16 |
5 |
|
T17 |
14 |
|
T18 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T16 |
11 |
|
T17 |
57 |
|
T18 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T16 |
5 |
|
T17 |
12 |
|
T18 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T16 |
11 |
|
T17 |
51 |
|
T18 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T16 |
5 |
|
T17 |
14 |
|
T18 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T16 |
10 |
|
T17 |
56 |
|
T18 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T16 |
5 |
|
T17 |
12 |
|
T18 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T16 |
11 |
|
T17 |
51 |
|
T18 |
25 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T16 |
5 |
|
T17 |
14 |
|
T18 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1222 |
1 |
|
|
T16 |
10 |
|
T17 |
55 |
|
T18 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T16 |
5 |
|
T17 |
12 |
|
T18 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T16 |
10 |
|
T17 |
51 |
|
T18 |
23 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T16 |
5 |
|
T17 |
14 |
|
T18 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1186 |
1 |
|
|
T16 |
9 |
|
T17 |
55 |
|
T18 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T16 |
5 |
|
T17 |
12 |
|
T18 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T16 |
10 |
|
T17 |
49 |
|
T18 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T16 |
5 |
|
T17 |
14 |
|
T18 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1160 |
1 |
|
|
T16 |
9 |
|
T17 |
55 |
|
T18 |
19 |