Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7335285 |
1 |
|
|
T21 |
1 |
|
T22 |
392 |
|
T23 |
33541 |
| auto[1] |
5184291 |
1 |
|
|
T22 |
183 |
|
T23 |
24629 |
|
T1 |
40496 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11856153 |
1 |
|
|
T21 |
1 |
|
T22 |
536 |
|
T23 |
55405 |
| auto[1] |
663423 |
1 |
|
|
T22 |
39 |
|
T23 |
2765 |
|
T1 |
4893 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7334742 |
1 |
|
|
T21 |
1 |
|
T22 |
356 |
|
T23 |
32240 |
| auto[1] |
5184834 |
1 |
|
|
T22 |
219 |
|
T23 |
25930 |
|
T1 |
38558 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2246162 |
1 |
|
|
T22 |
111 |
|
T23 |
12408 |
|
T1 |
15549 |
| auto[1] |
auto[0] |
auto[1] |
329474 |
1 |
|
|
T22 |
24 |
|
T23 |
1498 |
|
T1 |
2307 |
| auto[1] |
auto[1] |
auto[0] |
2275249 |
1 |
|
|
T22 |
69 |
|
T23 |
10757 |
|
T1 |
18116 |
| auto[1] |
auto[1] |
auto[1] |
333949 |
1 |
|
|
T22 |
15 |
|
T23 |
1267 |
|
T1 |
2586 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |