Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7366635 |
1 |
|
|
T21 |
1 |
|
T22 |
219 |
|
T23 |
32727 |
| auto[1] |
5152941 |
1 |
|
|
T22 |
356 |
|
T23 |
25443 |
|
T1 |
35569 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11856183 |
1 |
|
|
T21 |
1 |
|
T22 |
503 |
|
T23 |
55501 |
| auto[1] |
663393 |
1 |
|
|
T22 |
72 |
|
T23 |
2669 |
|
T1 |
5500 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7339052 |
1 |
|
|
T21 |
1 |
|
T22 |
233 |
|
T23 |
33165 |
| auto[1] |
5180524 |
1 |
|
|
T22 |
342 |
|
T23 |
25005 |
|
T1 |
40854 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2252834 |
1 |
|
|
T22 |
104 |
|
T23 |
11670 |
|
T1 |
19149 |
| auto[1] |
auto[0] |
auto[1] |
329961 |
1 |
|
|
T22 |
28 |
|
T23 |
1456 |
|
T1 |
3068 |
| auto[1] |
auto[1] |
auto[0] |
2264297 |
1 |
|
|
T22 |
166 |
|
T23 |
10666 |
|
T1 |
16205 |
| auto[1] |
auto[1] |
auto[1] |
333432 |
1 |
|
|
T22 |
44 |
|
T23 |
1213 |
|
T1 |
2432 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |