Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2267670 |
1 |
|
|
T22 |
83 |
|
T23 |
10848 |
|
T1 |
15603 |
| auto[1] |
auto[0] |
auto[1] |
332991 |
1 |
|
|
T22 |
20 |
|
T23 |
1327 |
|
T1 |
2327 |
| auto[1] |
auto[1] |
auto[0] |
2227132 |
1 |
|
|
T22 |
71 |
|
T23 |
11206 |
|
T1 |
16416 |
| auto[1] |
auto[1] |
auto[1] |
326389 |
1 |
|
|
T22 |
11 |
|
T23 |
1330 |
|
T1 |
2546 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |