Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7317072 |
1 |
|
|
T21 |
1 |
|
T22 |
285 |
|
T23 |
30946 |
| auto[1] |
5202504 |
1 |
|
|
T22 |
290 |
|
T23 |
27224 |
|
T1 |
39304 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10398990 |
1 |
|
|
T21 |
1 |
|
T22 |
452 |
|
T23 |
42652 |
| auto[1] |
2120586 |
1 |
|
|
T22 |
123 |
|
T23 |
15518 |
|
T1 |
22918 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7357125 |
1 |
|
|
T21 |
1 |
|
T22 |
327 |
|
T23 |
33232 |
| auto[1] |
5162451 |
1 |
|
|
T22 |
248 |
|
T23 |
24938 |
|
T1 |
37949 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1500173 |
1 |
|
|
T22 |
73 |
|
T23 |
4528 |
|
T1 |
7500 |
| auto[1] |
auto[0] |
auto[1] |
1051839 |
1 |
|
|
T22 |
59 |
|
T23 |
7578 |
|
T1 |
11038 |
| auto[1] |
auto[1] |
auto[0] |
1541692 |
1 |
|
|
T22 |
52 |
|
T23 |
4892 |
|
T1 |
7531 |
| auto[1] |
auto[1] |
auto[1] |
1068747 |
1 |
|
|
T22 |
64 |
|
T23 |
7940 |
|
T1 |
11880 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |