Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7339675 |
1 |
|
|
T21 |
1 |
|
T22 |
247 |
|
T23 |
32489 |
| auto[1] |
5179901 |
1 |
|
|
T22 |
328 |
|
T23 |
25681 |
|
T1 |
37184 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10393592 |
1 |
|
|
T21 |
1 |
|
T22 |
382 |
|
T23 |
41050 |
| auto[1] |
2125984 |
1 |
|
|
T22 |
193 |
|
T23 |
17120 |
|
T1 |
23571 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7352799 |
1 |
|
|
T21 |
1 |
|
T22 |
204 |
|
T23 |
30558 |
| auto[1] |
5166777 |
1 |
|
|
T22 |
371 |
|
T23 |
27612 |
|
T1 |
38685 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1517670 |
1 |
|
|
T22 |
79 |
|
T23 |
5261 |
|
T1 |
7737 |
| auto[1] |
auto[0] |
auto[1] |
1062762 |
1 |
|
|
T22 |
88 |
|
T23 |
8894 |
|
T1 |
12439 |
| auto[1] |
auto[1] |
auto[0] |
1523123 |
1 |
|
|
T22 |
99 |
|
T23 |
5231 |
|
T1 |
7377 |
| auto[1] |
auto[1] |
auto[1] |
1063222 |
1 |
|
|
T22 |
105 |
|
T23 |
8226 |
|
T1 |
11132 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |