Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7348794 |
1 |
|
|
T21 |
1 |
|
T22 |
388 |
|
T23 |
33652 |
| auto[1] |
5170782 |
1 |
|
|
T22 |
187 |
|
T23 |
24518 |
|
T1 |
39155 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10388430 |
1 |
|
|
T21 |
1 |
|
T22 |
425 |
|
T23 |
41467 |
| auto[1] |
2131146 |
1 |
|
|
T22 |
150 |
|
T23 |
16703 |
|
T1 |
23950 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7344120 |
1 |
|
|
T21 |
1 |
|
T22 |
268 |
|
T23 |
31721 |
| auto[1] |
5175456 |
1 |
|
|
T22 |
307 |
|
T23 |
26449 |
|
T1 |
39310 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1522916 |
1 |
|
|
T22 |
80 |
|
T23 |
5000 |
|
T1 |
7642 |
| auto[1] |
auto[0] |
auto[1] |
1071858 |
1 |
|
|
T22 |
77 |
|
T23 |
8714 |
|
T1 |
12159 |
| auto[1] |
auto[1] |
auto[0] |
1521394 |
1 |
|
|
T22 |
77 |
|
T23 |
4746 |
|
T1 |
7718 |
| auto[1] |
auto[1] |
auto[1] |
1059288 |
1 |
|
|
T22 |
73 |
|
T23 |
7989 |
|
T1 |
11791 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |