Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7344080 |
1 |
|
|
T21 |
1 |
|
T22 |
170 |
|
T23 |
33195 |
| auto[1] |
5175496 |
1 |
|
|
T22 |
405 |
|
T23 |
24975 |
|
T1 |
39854 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10385165 |
1 |
|
|
T21 |
1 |
|
T22 |
455 |
|
T23 |
41643 |
| auto[1] |
2134411 |
1 |
|
|
T22 |
120 |
|
T23 |
16527 |
|
T1 |
23827 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7328415 |
1 |
|
|
T21 |
1 |
|
T22 |
328 |
|
T23 |
32066 |
| auto[1] |
5191161 |
1 |
|
|
T22 |
247 |
|
T23 |
26104 |
|
T1 |
38820 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1530713 |
1 |
|
|
T22 |
33 |
|
T23 |
4761 |
|
T1 |
7308 |
| auto[1] |
auto[0] |
auto[1] |
1068921 |
1 |
|
|
T22 |
42 |
|
T23 |
8486 |
|
T1 |
11332 |
| auto[1] |
auto[1] |
auto[0] |
1526037 |
1 |
|
|
T22 |
94 |
|
T23 |
4816 |
|
T1 |
7685 |
| auto[1] |
auto[1] |
auto[1] |
1065490 |
1 |
|
|
T22 |
78 |
|
T23 |
8041 |
|
T1 |
12495 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |