Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7298579 |
1 |
|
|
T21 |
1 |
|
T22 |
127 |
|
T23 |
32611 |
| auto[1] |
5220997 |
1 |
|
|
T22 |
448 |
|
T23 |
25559 |
|
T1 |
40038 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11857623 |
1 |
|
|
T21 |
1 |
|
T22 |
527 |
|
T23 |
55545 |
| auto[1] |
661953 |
1 |
|
|
T22 |
48 |
|
T23 |
2625 |
|
T1 |
4874 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7346019 |
1 |
|
|
T21 |
1 |
|
T22 |
329 |
|
T23 |
33320 |
| auto[1] |
5173557 |
1 |
|
|
T22 |
246 |
|
T23 |
24850 |
|
T1 |
37291 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2228659 |
1 |
|
|
T22 |
73 |
|
T23 |
11282 |
|
T1 |
16020 |
| auto[1] |
auto[0] |
auto[1] |
326783 |
1 |
|
|
T22 |
18 |
|
T23 |
1299 |
|
T1 |
2381 |
| auto[1] |
auto[1] |
auto[0] |
2282945 |
1 |
|
|
T22 |
125 |
|
T23 |
10943 |
|
T1 |
16397 |
| auto[1] |
auto[1] |
auto[1] |
335170 |
1 |
|
|
T22 |
30 |
|
T23 |
1326 |
|
T1 |
2493 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |