Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6572899 |
1 |
|
|
T21 |
82 |
|
T22 |
1 |
|
T23 |
1725 |
| auto[1] |
4445595 |
1 |
|
|
T21 |
51 |
|
T29 |
153 |
|
T30 |
1462 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10460294 |
1 |
|
|
T21 |
131 |
|
T22 |
1 |
|
T23 |
1725 |
| auto[1] |
558200 |
1 |
|
|
T21 |
2 |
|
T29 |
6 |
|
T30 |
224 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6595789 |
1 |
|
|
T21 |
94 |
|
T22 |
1 |
|
T23 |
1725 |
| auto[1] |
4422705 |
1 |
|
|
T21 |
39 |
|
T29 |
114 |
|
T30 |
1129 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1928483 |
1 |
|
|
T21 |
19 |
|
T29 |
24 |
|
T30 |
345 |
| auto[1] |
auto[0] |
auto[1] |
276832 |
1 |
|
|
T29 |
2 |
|
T30 |
85 |
|
T1 |
2 |
| auto[1] |
auto[1] |
auto[0] |
1936022 |
1 |
|
|
T21 |
18 |
|
T29 |
84 |
|
T30 |
560 |
| auto[1] |
auto[1] |
auto[1] |
281368 |
1 |
|
|
T21 |
2 |
|
T29 |
4 |
|
T30 |
139 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |